From da6a7b1263cf624790f06a5f944366fb113dffc8 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Fri, 26 May 2006 13:48:35 -0400 Subject: Add names to memory Port objects for tracing. --HG-- extra : convert_revision : ddf30084e343e8656e4812ab20356292b35507ee --- src/cpu/cpu_exec_context.cc | 12 ++++++++---- src/cpu/simple/atomic.cc | 2 +- src/cpu/simple/atomic.hh | 4 ++-- src/cpu/simple/timing.hh | 8 ++++---- src/dev/io_device.cc | 4 ++-- src/mem/bridge.hh | 2 +- src/mem/bus.cc | 10 ++++++++++ src/mem/bus.hh | 12 +++--------- src/mem/physical.cc | 9 +++++---- src/mem/physical.hh | 2 +- src/mem/port.hh | 23 +++++++++++++++++++++++ src/mem/translating_port.cc | 5 +++-- src/mem/translating_port.hh | 9 +++------ src/mem/vport.hh | 4 ++-- src/sim/process.cc | 2 +- src/sim/system.cc | 2 ++ 16 files changed, 71 insertions(+), 39 deletions(-) diff --git a/src/cpu/cpu_exec_context.cc b/src/cpu/cpu_exec_context.cc index ec1e94561..b8aa9a67e 100644 --- a/src/cpu/cpu_exec_context.cc +++ b/src/cpu/cpu_exec_context.cc @@ -80,12 +80,14 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, System *_sys, profilePC = 3; Port *mem_port; - physPort = new FunctionalPort(); + physPort = new FunctionalPort(csprintf("%s-%d-funcport", + cpu->name(), thread_num)); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(physPort); physPort->setPeer(mem_port); - virtPort = new VirtualPort(); + virtPort = new VirtualPort(csprintf("%s-%d-vport", + cpu->name(), thread_num)); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(virtPort); virtPort->setPeer(mem_port); @@ -100,7 +102,9 @@ CPUExecContext::CPUExecContext(BaseCPU *_cpu, int _thread_num, { /* Use this port to for syscall emulation writes to memory. */ Port *mem_port; - port = new TranslatingPort(process->pTable, false); + port = new TranslatingPort(csprintf("%s-%d-funcport", + cpu->name(), thread_num), + process->pTable, false); mem_port = memobj->getPort("functional"); mem_port->setPeer(port); port->setPeer(mem_port); @@ -300,7 +304,7 @@ CPUExecContext::getVirtPort(ExecContext *xc) VirtualPort *vp; Port *mem_port; - vp = new VirtualPort(xc); + vp = new VirtualPort("xc-vport", xc); mem_port = system->physmem->getPort("functional"); mem_port->setPeer(vp); vp->setPeer(mem_port); diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index e9422b9c0..04a84c92a 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -117,7 +117,7 @@ AtomicSimpleCPU::CpuPort::recvRetry() AtomicSimpleCPU::AtomicSimpleCPU(Params *p) : BaseSimpleCPU(p), tickEvent(this), width(p->width), simulate_stalls(p->simulate_stalls), - icachePort(this), dcachePort(this) + icachePort(name() + "-iport", this), dcachePort(name() + "-iport", this) { _status = Idle; diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index d0ba085f0..ab3a3e8ef 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -84,8 +84,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU public: - CpuPort(AtomicSimpleCPU *_cpu) - : cpu(_cpu) + CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu) + : Port(_name), cpu(_cpu) { } protected: diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 83be025d9..7f38e629a 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -71,8 +71,8 @@ class TimingSimpleCPU : public BaseSimpleCPU public: - CpuPort(TimingSimpleCPU *_cpu) - : cpu(_cpu) + CpuPort(const std::string &_name, TimingSimpleCPU *_cpu) + : Port(_name), cpu(_cpu) { } protected: @@ -93,7 +93,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: IcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-iport", _cpu) { } protected: @@ -108,7 +108,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: DcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-dport", _cpu) { } protected: diff --git a/src/dev/io_device.cc b/src/dev/io_device.cc index 5f7770a92..28b50f9e8 100644 --- a/src/dev/io_device.cc +++ b/src/dev/io_device.cc @@ -31,7 +31,7 @@ PioPort::PioPort(PioDevice *dev, Platform *p) - : device(dev), platform(p) + : Port(dev->name() + "-pioport"), device(dev), platform(p) { } @@ -108,7 +108,7 @@ BasicPioDevice::addressRanges(AddrRangeList &range_list) DmaPort::DmaPort(DmaDevice *dev, Platform *p) - : device(dev), platform(p), pendingCount(0) + : Port(dev->name() + "-dmaport"), device(dev), platform(p), pendingCount(0) { } bool diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh index 5f19ded40..2672a6e8c 100644 --- a/src/mem/bridge.hh +++ b/src/mem/bridge.hh @@ -95,7 +95,7 @@ class Bridge : public MemObject /** Constructor for the BusPort.*/ BridgePort(Bridge *_bridge, Side _side) - : bridge(_bridge), side(_side) + : Port(""), bridge(_bridge), side(_side) { } int numQueued() { return outbound.size(); } diff --git a/src/mem/bus.cc b/src/mem/bus.cc index e8dfbc2e6..4139bf643 100644 --- a/src/mem/bus.cc +++ b/src/mem/bus.cc @@ -35,6 +35,16 @@ #include "mem/bus.hh" #include "sim/builder.hh" +Port * +Bus::getPort(const std::string &if_name) +{ + // if_name ignored? forced to be empty? + int id = interfaces.size(); + BusPort *bp = new BusPort(csprintf("%s-p%d", name(), id), this, id); + interfaces.push_back(bp); + return bp; +} + /** Get the ranges of anyone that we are connected to. */ void Bus::init() diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 38573e514..1d3a7e528 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -100,8 +100,8 @@ class Bus : public MemObject public: /** Constructor for the BusPort.*/ - BusPort(Bus *_bus, int _id) - : bus(_bus), id(_id) + BusPort(const std::string &_name, Bus *_bus, int _id) + : Port(_name), bus(_bus), id(_id) { } protected: @@ -146,13 +146,7 @@ class Bus : public MemObject public: /** A function used to return the port associated with this bus object. */ - virtual Port *getPort(const std::string &if_name) - { - // if_name ignored? forced to be empty? - int id = interfaces.size(); - interfaces.push_back(new BusPort(this, id)); - return interfaces.back(); - } + virtual Port *getPort(const std::string &if_name); virtual void init(); diff --git a/src/mem/physical.cc b/src/mem/physical.cc index 75179f9e3..ae27d762f 100644 --- a/src/mem/physical.cc +++ b/src/mem/physical.cc @@ -175,11 +175,11 @@ PhysicalMemory::getPort(const std::string &if_name) if (if_name == "") { if (port != NULL) panic("PhysicalMemory::getPort: additional port requested to memory!"); - port = new MemoryPort(this); + port = new MemoryPort(name() + "-port", this); return port; } else if (if_name == "functional") { /* special port for functional writes at startup. */ - return new MemoryPort(this); + return new MemoryPort(name() + "-funcport", this); } else { panic("PhysicalMemory::getPort: unknown port %s requested", if_name); } @@ -190,8 +190,9 @@ PhysicalMemory::recvStatusChange(Port::Status status) { } -PhysicalMemory::MemoryPort::MemoryPort(PhysicalMemory *_memory) - : memory(_memory) +PhysicalMemory::MemoryPort::MemoryPort(const std::string &_name, + PhysicalMemory *_memory) + : Port(_name), memory(_memory) { } void diff --git a/src/mem/physical.hh b/src/mem/physical.hh index 1cf5444ab..2ced79045 100644 --- a/src/mem/physical.hh +++ b/src/mem/physical.hh @@ -51,7 +51,7 @@ class PhysicalMemory : public MemObject public: - MemoryPort(PhysicalMemory *_memory); + MemoryPort(const std::string &_name, PhysicalMemory *_memory); protected: diff --git a/src/mem/port.hh b/src/mem/port.hh index 1b1920c03..e8a20235a 100644 --- a/src/mem/port.hh +++ b/src/mem/port.hh @@ -69,9 +69,28 @@ typedef std::list >::iterator AddrRangeIter; */ class Port { + private: + + /** Descriptive name (for DPRINTF output) */ + const std::string portName; + public: + /** + * Constructor. + * + * @param _name Port name for DPRINTF output. Should include name + * of memory system object to which the port belongs. + */ + Port(const std::string &_name) + : portName(_name) + { } + + /** Return port name (for DPRINTF). */ + const std::string &name() const { return portName; } + virtual ~Port() {}; + // mey be better to use subclasses & RTTI? /** Holds the ports status. Keeps track if it is blocked, or has calculated a range change. */ @@ -224,6 +243,10 @@ class Port class FunctionalPort : public Port { public: + FunctionalPort(const std::string &_name) + : Port(_name) + {} + virtual bool recvTiming(Packet *pkt) { panic("FuncPort is UniDir"); } virtual Tick recvAtomic(Packet *pkt) { panic("FuncPort is UniDir"); } virtual void recvFunctional(Packet *pkt) { panic("FuncPort is UniDir"); } diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc index 5dfeaff31..ee4d277b6 100644 --- a/src/mem/translating_port.cc +++ b/src/mem/translating_port.cc @@ -34,8 +34,9 @@ using namespace TheISA; -TranslatingPort::TranslatingPort(PageTable *p_table, bool alloc) - : pTable(p_table), allocating(alloc) +TranslatingPort::TranslatingPort(const std::string &_name, + PageTable *p_table, bool alloc) + : FunctionalPort(_name), pTable(p_table), allocating(alloc) { } TranslatingPort::~TranslatingPort() diff --git a/src/mem/translating_port.hh b/src/mem/translating_port.hh index 7611ac3c7..d078158a3 100644 --- a/src/mem/translating_port.hh +++ b/src/mem/translating_port.hh @@ -39,14 +39,11 @@ class TranslatingPort : public FunctionalPort PageTable *pTable; bool allocating; - TranslatingPort(const TranslatingPort &specmem); - const TranslatingPort &operator=(const TranslatingPort &specmem); - public: - TranslatingPort(PageTable *p_table, bool alloc = false); + TranslatingPort(const std::string &_name, + PageTable *p_table, bool alloc = false); virtual ~TranslatingPort(); - public: bool tryReadBlob(Addr addr, uint8_t *p, int size); bool tryWriteBlob(Addr addr, uint8_t *p, int size); bool tryMemsetBlob(Addr addr, uint8_t val, int size); @@ -56,9 +53,9 @@ class TranslatingPort : public FunctionalPort virtual void readBlob(Addr addr, uint8_t *p, int size); virtual void writeBlob(Addr addr, uint8_t *p, int size); virtual void memsetBlob(Addr addr, uint8_t val, int size); + void writeString(Addr addr, const char *str); void readString(std::string &str, Addr addr); - }; #endif diff --git a/src/mem/vport.hh b/src/mem/vport.hh index fbc230ba3..0f3b1f09e 100644 --- a/src/mem/vport.hh +++ b/src/mem/vport.hh @@ -53,8 +53,8 @@ class VirtualPort : public FunctionalPort ExecContext *xc; public: - VirtualPort(ExecContext *_xc = NULL) - : xc(_xc) + VirtualPort(const std::string &_name, ExecContext *_xc = NULL) + : FunctionalPort(_name), xc(_xc) {} /** Return true if we have an exec context. This is used to prevent someone diff --git a/src/sim/process.cc b/src/sim/process.cc index 1261b8436..1da525093 100644 --- a/src/sim/process.cc +++ b/src/sim/process.cc @@ -154,7 +154,7 @@ Process::startup() Port *mem_port; mem_port = system->physmem->getPort("functional"); - initVirtMem = new TranslatingPort(pTable, true); + initVirtMem = new TranslatingPort("process init port", pTable, true); mem_port->setPeer(initVirtMem); initVirtMem->setPeer(mem_port); } diff --git a/src/sim/system.cc b/src/sim/system.cc index ca9d68d77..89f39491e 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -25,6 +25,8 @@ System::System(Params *p) : SimObject(p->name), physmem(p->physmem), numcpus(0), #if FULL_SYSTEM init_param(p->init_param), + functionalPort(p->name + "-fport"), + virtPort(p->name + "-vport"), #else page_ptr(0), #endif -- cgit v1.2.3