From a1f92af0fb5627009b393d317c959cb6d4d692cf Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 17 Mar 2007 21:23:03 -0400 Subject: The syntax used for twin stores was confusing the parser so it's now broken down farther. --HG-- extra : convert_revision : d36bef2d15bc013b3c6199901f57855dfb9dab76 --- src/arch/sparc/isa/decoder.isa | 20 ++++++++++++++++---- 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 556bb4bca..68b2183ad 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -1324,8 +1324,14 @@ decode OP default Unknown::unknown() 0x05: stb({{Mem.ub = Rd.sb;}}); 0x06: sth({{Mem.uhw = Rd.shw;}}); 0x07: sttw({{ - (Mem.tuw).a = RdLow<31:0>; - (Mem.tuw).b = RdHigh<31:0>; + //This temporary needs to be here so that the parser + //will correctly identify this instruction as a store. + //It's probably either the parenthesis or referencing + //the member variable that throws confuses it. + Twin32_t temp; + temp.a = RdLow<31:0>; + temp.b = RdHigh<31:0>; + Mem.tuw = temp; }}); } format Load { @@ -1417,8 +1423,14 @@ decode OP default Unknown::unknown() 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 0x17: sttwa({{ - (Mem.tuw).a = RdLow<31:0>; - (Mem.tuw).b = RdHigh<31:0>; + //This temporary needs to be here so that the parser + //will correctly identify this instruction as a store. + //It's probably either the parenthesis or referencing + //the member variable that throws confuses it. + Twin32_t temp; + temp.a = RdLow<31:0>; + temp.b = RdHigh<31:0>; + Mem.tuw = temp; }}, {{EXT_ASI}}); } format LoadAlt { -- cgit v1.2.3