From ebe65a394bdb6b23d99fa01bcea105065a648991 Mon Sep 17 00:00:00 2001 From: Andreas Sandberg Date: Fri, 2 Nov 2012 11:32:01 -0500 Subject: cpu: Add header files for checker CPUs In order to create reliable SWIG wrappers, we need to include the declaration of the wrapped class in the SWIG file. Previously, we didn't expose the declaration of checker CPUs. This patch adds header files for such CPUs and include them in the SWIG wrapper. --HG-- rename : src/cpu/dummy_checker_builder.cc => src/cpu/dummy_checker.cc rename : src/cpu/o3/checker_builder.cc => src/cpu/o3/checker.cc --- src/cpu/DummyChecker.py | 1 + src/cpu/SConscript | 2 +- src/cpu/dummy_checker.cc | 80 ++++++++++++++++++++++++++++ src/cpu/dummy_checker.hh | 56 ++++++++++++++++++++ src/cpu/dummy_checker_builder.cc | 98 ---------------------------------- src/cpu/o3/O3Checker.py | 2 + src/cpu/o3/SConscript | 2 +- src/cpu/o3/checker.cc | 93 +++++++++++++++++++++++++++++++++ src/cpu/o3/checker.hh | 61 ++++++++++++++++++++++ src/cpu/o3/checker_builder.cc | 110 --------------------------------------- 10 files changed, 295 insertions(+), 210 deletions(-) create mode 100644 src/cpu/dummy_checker.cc create mode 100644 src/cpu/dummy_checker.hh delete mode 100644 src/cpu/dummy_checker_builder.cc create mode 100644 src/cpu/o3/checker.cc create mode 100644 src/cpu/o3/checker.hh delete mode 100644 src/cpu/o3/checker_builder.cc diff --git a/src/cpu/DummyChecker.py b/src/cpu/DummyChecker.py index 3c276e1d2..e75f7057e 100644 --- a/src/cpu/DummyChecker.py +++ b/src/cpu/DummyChecker.py @@ -40,3 +40,4 @@ from BaseCPU import BaseCPU class DummyChecker(BaseCPU): type = 'DummyChecker' + cxx_header = 'cpu/dummy_checker.hh' diff --git a/src/cpu/SConscript b/src/cpu/SConscript index e1ba59b8b..913e58a8e 100644 --- a/src/cpu/SConscript +++ b/src/cpu/SConscript @@ -127,7 +127,7 @@ if env['TARGET_ISA'] == 'sparc': SimObject('DummyChecker.py') Source('checker/cpu.cc') -Source('dummy_checker_builder.cc') +Source('dummy_checker.cc') DebugFlag('Checker') DebugFlag('Activity') diff --git a/src/cpu/dummy_checker.cc b/src/cpu/dummy_checker.cc new file mode 100644 index 000000000..6a0210e3b --- /dev/null +++ b/src/cpu/dummy_checker.cc @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Geoffrey Blake + */ + +#include "cpu/dummy_checker.hh" +#include "params/DummyChecker.hh" + +//////////////////////////////////////////////////////////////////////// +// +// DummyChecker Simulation Object +// +DummyChecker * +DummyCheckerParams::create() +{ + DummyChecker::Params *params = new DummyChecker::Params(); + params->name = name; + params->numThreads = numThreads; + params->max_insts_any_thread = 0; + params->max_insts_all_threads = 0; + params->max_loads_any_thread = 0; + params->max_loads_all_threads = 0; + params->clock = clock; + // Hack to touch all parameters. Consider not deriving Checker + // from BaseCPU..it's not really a CPU in the end. + Counter temp; + temp = max_insts_any_thread; + temp = max_insts_all_threads; + temp = max_loads_any_thread; + temp = max_loads_all_threads; + temp++; + Tick temp2 = progress_interval; + params->progress_interval = 0; + temp2++; + + params->itb = itb; + params->dtb = dtb; + params->system = system; + params->cpu_id = cpu_id; + params->profile = profile; + params->interrupts = NULL; + params->workload = workload; + + DummyChecker *cpu = new DummyChecker(params); + return cpu; +} diff --git a/src/cpu/dummy_checker.hh b/src/cpu/dummy_checker.hh new file mode 100644 index 000000000..59ca3f3af --- /dev/null +++ b/src/cpu/dummy_checker.hh @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Geoffrey Blake + */ + +#ifndef __CPU_DUMMY_CHECKER_HH__ +#define __CPU_DUMMY_CHECKER_HH__ + +#include "cpu/checker/cpu.hh" + +/** + * Specific non-templated derived class used for SimObject configuration. + */ +class DummyChecker : public CheckerCPU +{ + public: + DummyChecker(Params *p) + : CheckerCPU(p) + { } +}; + +#endif // __CPU_DUMMY_CHECKER_HH__ diff --git a/src/cpu/dummy_checker_builder.cc b/src/cpu/dummy_checker_builder.cc deleted file mode 100644 index fd2c9f74b..000000000 --- a/src/cpu/dummy_checker_builder.cc +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (c) 2011 ARM Limited - * All rights reserved - * - * The license below extends only to copyright in the software and shall - * not be construed as granting a license to any other intellectual - * property including but not limited to intellectual property relating - * to a hardware implementation of the functionality of the software - * licensed hereunder. You may use the software subject to the license - * terms below provided that you ensure that this notice is replicated - * unmodified and in its entirety in all distributions of the software, - * modified or unmodified, in source code or in binary form. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Geoffrey Blake - */ - -#include - -#include "cpu/checker/cpu.hh" -#include "cpu/inst_seq.hh" -#include "params/DummyChecker.hh" -#include "sim/process.hh" -#include "sim/sim_object.hh" - -class MemObject; - -/** - * Specific non-templated derived class used for SimObject configuration. - */ -class DummyChecker : public CheckerCPU -{ - public: - DummyChecker(Params *p) - : CheckerCPU(p) - { } -}; - -//////////////////////////////////////////////////////////////////////// -// -// DummyChecker Simulation Object -// -DummyChecker * -DummyCheckerParams::create() -{ - DummyChecker::Params *params = new DummyChecker::Params(); - params->name = name; - params->numThreads = numThreads; - params->max_insts_any_thread = 0; - params->max_insts_all_threads = 0; - params->max_loads_any_thread = 0; - params->max_loads_all_threads = 0; - params->clock = clock; - // Hack to touch all parameters. Consider not deriving Checker - // from BaseCPU..it's not really a CPU in the end. - Counter temp; - temp = max_insts_any_thread; - temp = max_insts_all_threads; - temp = max_loads_any_thread; - temp = max_loads_all_threads; - temp++; - Tick temp2 = progress_interval; - params->progress_interval = 0; - temp2++; - - params->itb = itb; - params->dtb = dtb; - params->system = system; - params->cpu_id = cpu_id; - params->profile = profile; - params->interrupts = NULL; - params->workload = workload; - - DummyChecker *cpu = new DummyChecker(params); - return cpu; -} diff --git a/src/cpu/o3/O3Checker.py b/src/cpu/o3/O3Checker.py index 5021b5ea7..d2dc8e95b 100644 --- a/src/cpu/o3/O3Checker.py +++ b/src/cpu/o3/O3Checker.py @@ -31,6 +31,8 @@ from BaseCPU import BaseCPU class O3Checker(BaseCPU): type = 'O3Checker' + cxx_header = 'cpu/o3/checker.hh' + exitOnError = Param.Bool(False, "Exit on an error") updateOnError = Param.Bool(False, "Update the checker with the main CPU's state on an error") diff --git a/src/cpu/o3/SConscript b/src/cpu/o3/SConscript index 8ca32c898..5e8e2ea66 100755 --- a/src/cpu/o3/SConscript +++ b/src/cpu/o3/SConscript @@ -79,4 +79,4 @@ if 'O3CPU' in env['CPU_MODELS']: 'DynInst', 'O3CPU', 'Activity', 'Scoreboard', 'Writeback' ]) SimObject('O3Checker.py') - Source('checker_builder.cc') + Source('checker.cc') diff --git a/src/cpu/o3/checker.cc b/src/cpu/o3/checker.cc new file mode 100644 index 000000000..c99428617 --- /dev/null +++ b/src/cpu/o3/checker.cc @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Copyright (c) 2006 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Kevin Lim + */ + +#include "cpu/checker/cpu_impl.hh" +#include "cpu/o3/checker.hh" +#include "params/O3Checker.hh" + +class MemObject; + +template +class Checker; + +//////////////////////////////////////////////////////////////////////// +// +// CheckerCPU Simulation Object +// +O3Checker * +O3CheckerParams::create() +{ + O3Checker::Params *params = new O3Checker::Params(); + params->name = name; + params->numThreads = numThreads; + params->max_insts_any_thread = 0; + params->max_insts_all_threads = 0; + params->max_loads_any_thread = 0; + params->max_loads_all_threads = 0; + params->exitOnError = exitOnError; + params->updateOnError = updateOnError; + params->warnOnlyOnLoadError = warnOnlyOnLoadError; + params->clock = clock; + params->tracer = tracer; + // Hack to touch all parameters. Consider not deriving Checker + // from BaseCPU..it's not really a CPU in the end. + Counter temp; + temp = max_insts_any_thread; + temp = max_insts_all_threads; + temp = max_loads_any_thread; + temp = max_loads_all_threads; + temp++; + Tick temp2 = progress_interval; + params->progress_interval = 0; + temp2++; + + params->itb = itb; + params->dtb = dtb; + params->system = system; + params->cpu_id = cpu_id; + params->profile = profile; + params->interrupts = NULL; + params->workload = workload; + + O3Checker *cpu = new O3Checker(params); + return cpu; +} diff --git a/src/cpu/o3/checker.hh b/src/cpu/o3/checker.hh new file mode 100644 index 000000000..f9e2088c1 --- /dev/null +++ b/src/cpu/o3/checker.hh @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2011 ARM Limited + * All rights reserved + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * + * Copyright (c) 2006 The Regents of The University of Michigan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its + * contributors may be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * Authors: Kevin Lim + */ + +#ifndef __CPU_O3_CHECKER_HH__ +#define __CPU_O3_CHECKER_HH__ + +#include "cpu/checker/cpu.hh" +#include "cpu/o3/dyn_inst.hh" +#include "cpu/o3/impl.hh" + +/** + * Specific non-templated derived class used for SimObject configuration. + */ +class O3Checker : public Checker +{ + public: + O3Checker(Params *p) + : Checker(p) + { } +}; + +#endif // __CPU_O3_CHECKER_HH__ diff --git a/src/cpu/o3/checker_builder.cc b/src/cpu/o3/checker_builder.cc deleted file mode 100644 index 757b1a87f..000000000 --- a/src/cpu/o3/checker_builder.cc +++ /dev/null @@ -1,110 +0,0 @@ -/* - * Copyright (c) 2011 ARM Limited - * All rights reserved - * - * The license below extends only to copyright in the software and shall - * not be construed as granting a license to any other intellectual - * property including but not limited to intellectual property relating - * to a hardware implementation of the functionality of the software - * licensed hereunder. You may use the software subject to the license - * terms below provided that you ensure that this notice is replicated - * unmodified and in its entirety in all distributions of the software, - * modified or unmodified, in source code or in binary form. - * - * Copyright (c) 2006 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Kevin Lim - */ - -#include - -#include "cpu/checker/cpu_impl.hh" -#include "cpu/o3/dyn_inst.hh" -#include "cpu/o3/impl.hh" -#include "cpu/inst_seq.hh" -#include "params/O3Checker.hh" -#include "sim/process.hh" -#include "sim/sim_object.hh" - -class MemObject; - -template -class Checker; - -/** - * Specific non-templated derived class used for SimObject configuration. - */ -class O3Checker : public Checker -{ - public: - O3Checker(Params *p) - : Checker(p) - { } -}; - -//////////////////////////////////////////////////////////////////////// -// -// CheckerCPU Simulation Object -// -O3Checker * -O3CheckerParams::create() -{ - O3Checker::Params *params = new O3Checker::Params(); - params->name = name; - params->numThreads = numThreads; - params->max_insts_any_thread = 0; - params->max_insts_all_threads = 0; - params->max_loads_any_thread = 0; - params->max_loads_all_threads = 0; - params->exitOnError = exitOnError; - params->updateOnError = updateOnError; - params->warnOnlyOnLoadError = warnOnlyOnLoadError; - params->clock = clock; - params->tracer = tracer; - // Hack to touch all parameters. Consider not deriving Checker - // from BaseCPU..it's not really a CPU in the end. - Counter temp; - temp = max_insts_any_thread; - temp = max_insts_all_threads; - temp = max_loads_any_thread; - temp = max_loads_all_threads; - temp++; - Tick temp2 = progress_interval; - params->progress_interval = 0; - temp2++; - - params->itb = itb; - params->dtb = dtb; - params->system = system; - params->cpu_id = cpu_id; - params->profile = profile; - params->interrupts = NULL; - params->workload = workload; - - O3Checker *cpu = new O3Checker(params); - return cpu; -} -- cgit v1.2.3