From 3c7071a6be21fc0c87753758fc09ff28890edc99 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Sun, 9 May 2004 20:14:18 -0400 Subject: Added ULL for 64bit ints Added function to skip determine_cpu_caches(). We may have to update this in the future: see note below. arch/alpha/alpha_memory.cc: dev/ide_ctrl.cc: dev/tsunamireg.h: Added ULL for 64bit ints kern/linux/linux_system.cc: Added a function to skip determine_cpu_caches, right now it is only used for printing in proc, however in the future we may either want to implement the SC_CTL IPR register or manually set alpha_l1i_cacheshape, alpha_l1d_cacheshape, alpha_l2_cacheshape, alpha_l3_cacheshape to ((size << 10) | (linesize>>1)<<4 | way) kern/linux/linux_system.hh: added event to skip determine_cpu_caches() --HG-- extra : convert_revision : 1065f2091bbe6832b730af490f5b4672c2afedce --- arch/alpha/alpha_memory.cc | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/alpha/alpha_memory.cc') diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index cddee3b22..4cd122431 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -331,9 +331,9 @@ AlphaItb::translate(MemReqPtr &req) const // sign extend the physical address properly if (req->paddr & PA_UNCACHED_BIT_39 || req->paddr & PA_UNCACHED_BIT_40) - req->paddr |= 0xf0000000000; + req->paddr |= 0xf0000000000ULL; else - req->paddr &= 0xffffffffff; + req->paddr &= 0xffffffffffULL; } else { // not a physical address: need to look up pte @@ -520,9 +520,9 @@ AlphaDtb::translate(MemReqPtr &req, bool write) const // sign extend the physical address properly if (req->paddr & PA_UNCACHED_BIT_39 || req->paddr & PA_UNCACHED_BIT_40) - req->paddr |= 0xf0000000000; + req->paddr |= 0xf0000000000ULL; else - req->paddr &= 0xffffffffff; + req->paddr &= 0xffffffffffULL; } else { if (write) -- cgit v1.2.3