From 8106a804508a42455650082a83f4cdb366ca5148 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 7 Mar 2006 14:08:01 -0500 Subject: Pushed ev5.hh out of the non-alpha code. arch/SConscript: ev5 should now be contained within alpha specific code. arch/alpha/ev5.cc: arch/alpha/isa_traits.hh: Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed. arch/sparc/isa_traits.hh: Added getInstAsid and getDataAsid functions. These should be removed when the SimpleScalar cpu model is removed. Also made some small fixes. cpu/o3/alpha_cpu.hh: Added typedefs which are required now that there isn't a using namespace EV5. cpu/o3/alpha_cpu_impl.hh: Some small changes so that ev5.hh isn't needed directly. cpu/o3/cpu.hh: Removed including ev5.hh, and pushed retrieving the Asid into the MiscRegFile. cpu/o3/regfile.hh: Removed the include of ev5.hh, using namespace EV5, and the now redundant ipr array. --HG-- extra : convert_revision : 5ef8f69435a3a888a3f06d0095d89326dafb33fd --- arch/alpha/ev5.cc | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/alpha/ev5.cc') diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index e313c1a1c..47ada6de6 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -152,6 +152,18 @@ ExecContext::hwrei() return NoFault; } +int +AlphaISA::MiscRegFile::getInstAsid() +{ + return EV5::ITB_ASN_ASN(ipr[IPR_ITB_ASN]); +} + +int +AlphaISA::MiscRegFile::getDataAsid() +{ + return EV5::DTB_ASN_ASN(ipr[IPR_DTB_ASN]); +} + void AlphaISA::MiscRegFile::clearIprs() { -- cgit v1.2.3