From 7c089b2001afb93fe51b1a89456b15fd0d00c794 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 4 Mar 2004 14:57:57 -0500 Subject: Copy implementations arch/alpha/isa_desc: Need to return fault for copy operations. cpu/exec_context.hh: Add temporary storage to pass source address from copy load to copy store cpu/simple_cpu/simple_cpu.cc: Implement copy functions. cpu/simple_cpu/simple_cpu.hh: Return fault --HG-- extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90 --- arch/alpha/isa_desc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/alpha/isa_desc') diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 46fb306a4..41f7388e0 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1855,7 +1855,7 @@ decode OPCODE default Unknown::unknown() { 0x2a: ldl_l({{ EA = Rb + disp; }}, {{ Ra.sl = Mem.sl; }}, LOCKED); 0x2b: ldq_l({{ EA = Rb + disp; }}, {{ Ra.uq = Mem.uq; }}, LOCKED); 0x20: copy_load({{EA = Ra;}}, - {{memAccessObj->copySrcTranslate(EA);}}, + {{fault = memAccessObj->copySrcTranslate(EA);}}, IsMemRef, IsLoad, IsCopy); } @@ -1877,7 +1877,7 @@ decode OPCODE default Unknown::unknown() { 0x26: sts({{ EA = Rb + disp; }}, {{ Mem.ul = t_to_s(Fa.uq); }}); 0x27: stt({{ EA = Rb + disp; }}, {{ Mem.df = Fa; }}); 0x24: copy_store({{EA = Rb;}}, - {{memAccessObj->copy(EA);}}, + {{fault =memAccessObj->copy(EA);}}, IsMemRef, IsStore, IsCopy); } -- cgit v1.2.3