From 2eff368dd03c93a503e13ab82cf4c4abb0c06aa9 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Wed, 1 Mar 2006 05:26:08 -0500
Subject: Cleaned up some of the Fault system.

arch/alpha/ev5.cc:
    Commented out the intr_post function since it's not used. If this really -is- needed, it should be moved into the fault class.
arch/alpha/faults.cc:
arch/alpha/faults.hh:
    Moved the fault invocation code into the fault class fully, and got rid of the need for isA.
cpu/exec_context.cc:
cpu/exec_context.hh:
    Removed the trap function from the ExecContext. The faults will execute normally in full system mode, but always panic in syscall emulation mode.
cpu/ozone/cpu.hh:
cpu/simple/cpu.hh:
    Changed the execution context executing a fault to a fault executing on the execution context.
sim/faults.cc:
    If not in full system mode, trying to invoke a fault causes a panic.
sim/faults.hh:
    Removed the isA function.

--HG--
extra : convert_revision : 894dc8f0755c8efc4b7ef5a09fb2cf7373042395
---
 arch/alpha/ev5.cc    |  4 ++--
 arch/alpha/faults.cc | 24 +++++++++++++++++++-----
 arch/alpha/faults.hh | 10 ++++++++++
 3 files changed, 31 insertions(+), 7 deletions(-)

(limited to 'arch/alpha')

diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index ac0e7e67e..c6da628be 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -166,7 +166,7 @@ AlphaISA::zeroRegisters(CPU *cpu)
 void
 AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc)
 {
-    bool use_pc = (fault == NoFault);
+/*    bool use_pc = (fault == NoFault);
 
     if (fault->isA<ArithmeticFault>())
         panic("arithmetic faults NYI...");
@@ -186,7 +186,7 @@ AlphaISA::intr_post(RegFile *regs, Fault fault, Addr pc)
             (dynamic_cast<AlphaFault *>(fault.get()))->vect();
     else
         regs->npc = regs->miscRegs.readReg(IPR_PAL_BASE) + pc;
-
+*/
     // that's it! (orders of magnitude less painful than x86)
 }
 
diff --git a/arch/alpha/faults.cc b/arch/alpha/faults.cc
index bde7b3db1..7cdcc9bab 100644
--- a/arch/alpha/faults.cc
+++ b/arch/alpha/faults.cc
@@ -107,14 +107,11 @@ void AlphaFault::invoke(ExecContext * xc)
     assert(!xc->misspeculating());
     xc->kernelStats->fault(this);
 
-    if (isA<ArithmeticFault>())
-        panic("Arithmetic traps are unimplemented!");
-
     // exception restart address
-    if (!isA<InterruptFault>() || !xc->inPalMode())
+    if (setRestartAddress() || !xc->inPalMode())
         xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, xc->regs.pc);
 
-    if (isA<PalFault>() || isA<ArithmeticFault>()) {
+    if (skipFaultingInstruction()) {
         // traps...  skip faulting instruction.
         xc->setMiscReg(AlphaISA::IPR_EXC_ADDR,
                    xc->readMiscReg(AlphaISA::IPR_EXC_ADDR) + 4);
@@ -127,6 +124,23 @@ void AlphaFault::invoke(ExecContext * xc)
     xc->regs.npc = xc->regs.pc + sizeof(MachInst);
 }
 
+void ArithmeticFault::invoke(ExecContext * xc)
+{
+    DPRINTF(Fault, "Fault %s at PC: %#x\n", name(), xc->regs.pc);
+    xc->cpu->recordEvent(csprintf("Fault %s", name()));
+
+    assert(!xc->misspeculating());
+    xc->kernelStats->fault(this);
+
+    panic("Arithmetic traps are unimplemented!");
+}
+
+
+/*void ArithmeticFault::invoke(ExecContext * xc)
+{
+    panic("Arithmetic traps are unimplemented!");
+}*/
+
 #endif
 
 } // namespace AlphaISA
diff --git a/arch/alpha/faults.hh b/arch/alpha/faults.hh
index c0316288c..b9573905a 100644
--- a/arch/alpha/faults.hh
+++ b/arch/alpha/faults.hh
@@ -40,6 +40,9 @@ typedef const Addr FaultVect;
 
 class AlphaFault : public virtual FaultBase
 {
+  protected:
+    virtual bool skipFaultingInstruction() {return false;}
+    virtual bool setRestartAddress() {return true;}
   public:
 #if FULL_SYSTEM
     void invoke(ExecContext * xc);
@@ -95,6 +98,8 @@ class ResetFault : public AlphaFault
 
 class ArithmeticFault : public AlphaFault
 {
+  protected:
+    bool skipFaultingInstruction() {return true;}
   private:
     static FaultName _name;
     static FaultVect _vect;
@@ -103,10 +108,13 @@ class ArithmeticFault : public AlphaFault
     FaultName name() {return _name;}
     FaultVect vect() {return _vect;}
     FaultStat & stat() {return _stat;}
+    void invoke(ExecContext * xc);
 };
 
 class InterruptFault : public AlphaFault
 {
+  protected:
+    bool setRestartAddress() {return false;}
   private:
     static FaultName _name;
     static FaultVect _vect;
@@ -227,6 +235,8 @@ class FloatEnableFault : public AlphaFault
 
 class PalFault : public AlphaFault
 {
+  protected:
+    bool skipFaultingInstruction() {return true;}
   private:
     static FaultName _name;
     static FaultVect _vect;
-- 
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