From 53dde8579b9c8683163cf7a2ab9cf7571b3ef787 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 31 May 2004 16:19:31 -0700 Subject: Renamed OpClass enum members: they all end in 'Op' now. Got rid of two inconsistent sets of strings that corresponded to this enum, and replaced with a single set that clearly matches the enum names. arch/alpha/isa_desc: arch/isa_parser.py: cpu/full_cpu/op_class.hh: Renamed OpClass enum members. --HG-- extra : convert_revision : bf596f7568a20b2e77c07ac349f253135141aef4 --- arch/isa_parser.py | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/isa_parser.py') diff --git a/arch/isa_parser.py b/arch/isa_parser.py index c808c2565..011ce7623 100755 --- a/arch/isa_parser.py +++ b/arch/isa_parser.py @@ -1493,19 +1493,19 @@ class CodeBlock: # These are good enough for most cases, and will be overridden # later otherwise. if 'IsStore' in self.flags: - self.op_class = 'WrPort' + self.op_class = 'MemWriteOp' elif 'IsLoad' in self.flags or 'IsPrefetch' in self.flags: - self.op_class = 'RdPort' + self.op_class = 'MemReadOp' elif 'IsFloating' in self.flags: - self.op_class = 'FloatADD' + self.op_class = 'FloatAddOp' else: - self.op_class = 'IntALU' + self.op_class = 'IntAluOp' # Assume all instruction flags are of the form 'IsFoo' instFlagRE = re.compile(r'Is.*') -# OpClass constants are just a little more complicated -opClassRE = re.compile(r'Int.*|Float.*|.*Port|No_OpClass') +# OpClass constants end in 'Op' except No_OpClass +opClassRE = re.compile(r'.*Op|No_OpClass') class InstObjParams: def __init__(self, mnem, class_name, base_class = '', -- cgit v1.2.3