From a48c24b61eedf580645ff0294b225d1e69a9444b Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Sat, 18 Feb 2006 23:17:45 -0500 Subject: Support NNPC and branch instructions ... Outputs to decoder.cc correctly Edits to the CPU model may still need to be made to handle branch likely insts... arch/isa_parser.py: add a NNPC operand ... arch/mips/isa/base.isa: change SPARC to MIPS arch/mips/isa/decoder.isa: typo < to >= arch/mips/isa/formats/basic.isa: spacing arch/mips/isa/formats/branch.isa: add code for branch instructions (still need adjustments for the branch likely) arch/mips/isa/operands.isa: support for NNPC and R31 arch/mips/isa_traits.hh: NNPC Addr variable --HG-- extra : convert_revision : df03d2a71c36dbc00270c2e3d7882b4f09ed97ad --- arch/mips/isa/formats/basic.isa | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/isa/formats/basic.isa') diff --git a/arch/mips/isa/formats/basic.isa b/arch/mips/isa/formats/basic.isa index 24c397685..3b62aa5c3 100644 --- a/arch/mips/isa/formats/basic.isa +++ b/arch/mips/isa/formats/basic.isa @@ -40,7 +40,7 @@ def template BasicExecute {{ if(fault == No_Fault) { - %(op_wb)s; + %(op_wb)s; } return fault; } -- cgit v1.2.3