From 07d4ad4dbed164818bf7e643c362475084a33d15 Mon Sep 17 00:00:00 2001
From: Korey Sewell <ksewell@umich.edu>
Date: Thu, 27 Apr 2006 05:07:11 -0400
Subject: Rewrite CFC1 & CTC1 instruction definitions Use Load/Store Float
Memory Formats for FP mem insts Fix Load/Store into FP to not create a "nop"
if it sees reg 0 at the defintion
arch/mips/isa/decoder.isa:
Rewrite CFC1 & CTC1 instruction definitions
Use Load/Store Float Memory Formats for FP mem insts
arch/mips/isa/formats/fp.isa:
comment changes
arch/mips/isa/formats/mem.isa:
Fix Load/Store Float Memory Formats
--HG--
extra : convert_revision : ef1cb7a78452f8dff044b05c89e61bec866bf1b7
---
arch/mips/isa/formats/fp.isa | 4 ++--
arch/mips/isa/formats/mem.isa | 26 ++++++++++++--------------
2 files changed, 14 insertions(+), 16 deletions(-)
(limited to 'arch/mips/isa/formats')
diff --git a/arch/mips/isa/formats/fp.isa b/arch/mips/isa/formats/fp.isa
index 34b71acf7..65b259e20 100644
--- a/arch/mips/isa/formats/fp.isa
+++ b/arch/mips/isa/formats/fp.isa
@@ -30,7 +30,7 @@ output decoder {{
}};
-// Primary format for integer operate instructions:
+// Primary format for float operate instructions:
def format FloatOp(code, *flags) {{
iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
header_output = BasicDeclare.subst(iop)
@@ -39,7 +39,7 @@ def format FloatOp(code, *flags) {{
exec_output = BasicExecute.subst(iop)
}};
-// Primary format for integer operate instructions:
+// Primary format for float64 operate instructions:
def format Float64Op(code, *flags) {{
iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
header_output = BasicDeclare.subst(iop)
diff --git a/arch/mips/isa/formats/mem.isa b/arch/mips/isa/formats/mem.isa
index df1dca4e1..e2afc7252 100644
--- a/arch/mips/isa/formats/mem.isa
+++ b/arch/mips/isa/formats/mem.isa
@@ -446,30 +446,28 @@ def format StoreMemory(memacc_code, ea_code = {{ EA = Rs + disp; }},
exec_template_base = 'Store')
}};
-def format UnalignedStore(memacc_code, postacc_code,
- ea_code = {{ EA = Rb + disp; }},
+//FP loads are offloaded to these formats for now ...
+def format LoadFloatMemory(memacc_code, ea_code = {{ EA = Rs + disp; }},
mem_flags = [], inst_flags = []) {{
(header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
- postacc_code, exec_template_base = 'Store')
+ decode_template = BasicDecode,
+ exec_template_base = 'Load')
}};
-//FP loads are offloaded to these formats for now ...
-def format LoadMemory2(ea_code = {{ EA = Rs + disp; }}, memacc_code = {{ }},
- mem_flags = [], inst_flags = []) {{
+
+def format StoreFloatMemory(memacc_code, ea_code = {{ EA = Rs + disp; }},
+ mem_flags = [], inst_flags = []) {{
(header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
- decode_template = LoadNopCheckDecode,
- exec_template_base = 'Load')
+ exec_template_base = 'Store')
}};
-//FP stores are offloaded to these formats for now ...
-def format StoreMemory2(ea_code = {{ EA = Rs + disp; }},memacc_code = {{ }},
- mem_flags = [], inst_flags = []) {{
+def format UnalignedStore(memacc_code, postacc_code,
+ ea_code = {{ EA = Rb + disp; }},
+ mem_flags = [], inst_flags = []) {{
(header_output, decoder_output, decode_block, exec_output) = \
LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
- decode_template = LoadNopCheckDecode,
- exec_template_base = 'Store')
+ postacc_code, exec_template_base = 'Store')
}};
-
--
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