From bb8b27d5a82dc2ebbe2bcb2f0df253d1e24d57ff Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Tue, 14 Mar 2006 15:59:19 -0500 Subject: SPARC clean up towards compilability. --HG-- extra : convert_revision : 156670995fa61599e763b002cd70f31f19b108d1 --- arch/sparc/isa/base.isa | 4 ++-- arch/sparc/isa/decoder.isa | 2 +- arch/sparc/isa/includes.isa | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch/sparc/isa') diff --git a/arch/sparc/isa/base.isa b/arch/sparc/isa/base.isa index 992504369..916a9c5a5 100644 --- a/arch/sparc/isa/base.isa +++ b/arch/sparc/isa/base.isa @@ -11,7 +11,7 @@ output header {{ uint8_t v:1; uint8_t z:1; uint8_t n:1; - } + }; enum condTest { @@ -31,7 +31,7 @@ output header {{ Negative=0x6, OverflowClear=0xF, OverflowSet=0x7 - } + }; /** * Base class for all SPARC static instructions. diff --git a/arch/sparc/isa/decoder.isa b/arch/sparc/isa/decoder.isa index eb458211b..eaf3aab3b 100644 --- a/arch/sparc/isa/decoder.isa +++ b/arch/sparc/isa/decoder.isa @@ -6,7 +6,7 @@ decode OP default Trap::unknown({{IllegalInstruction}}) { 0x0: decode OP2 { - 0x0: Trap::illtrap({{illegal_instruction}}); //ILLTRAP + //0x0: Trap::illtrap({{IllegalInstruction}}); //ILLTRAP 0x1: Branch::bpcc({{ switch((CC12 << 1) | CC02) { diff --git a/arch/sparc/isa/includes.isa b/arch/sparc/isa/includes.isa index a99018b49..860f4657a 100644 --- a/arch/sparc/isa/includes.isa +++ b/arch/sparc/isa/includes.isa @@ -10,7 +10,7 @@ output header {{ #include "cpu/static_inst.hh" #include "arch/sparc/faults.hh" -#include "mem/mem_req.hh" // some constructors use MemReq flags +#include "mem/request.hh" // some constructors use MemReq flags #include "arch/sparc/isa_traits.hh" }}; @@ -34,7 +34,7 @@ output exec {{ #endif #ifdef FULL_SYSTEM -//#include "arch/alpha/pseudo_inst.hh" +//#include "sim/pseudo_inst.hh" #endif #include "cpu/base.hh" #include "cpu/exetrace.hh" -- cgit v1.2.3