From 1166d4f0bfe67a9dc178be3454b4f0eac38663ad Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 23 Feb 2006 14:50:16 -0500
Subject: Get rid of the xc from the alphaAccess/alphaConsole backdoor device.
 Now allocate an array of stacks indexed by cpu number which specify cpu
 stacks and are initialized by cpu 0. Othe cpus spin waiting for their stacks
 before continuing. This change *REQUIRES* a the new console code to operate
 correctly.

arch/alpha/ev5.cc:
    Add cpuId to initCPU/initIPR functions
cpu/o3/cpu.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
    Move the cpu initilization into an init() function since it now needs
    the CPU id which isn't known at construction
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
    instead of the bootstrap variables, add space for 64 cpu stacks in the
    alpha access structure.
sim/system.cc:
    start all cpus immediately rather than just the first one

--HG--
extra : convert_revision : 28c218af49d885a0f203ada419f16f25d5a3f37b
---
 arch/alpha/ev5.cc | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

(limited to 'arch')

diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc
index 125affd03..bd076dae4 100644
--- a/arch/alpha/ev5.cc
+++ b/arch/alpha/ev5.cc
@@ -70,12 +70,15 @@ AlphaISA::swap_palshadow(RegFile *regs, bool use_shadow)
 //  Machine dependent functions
 //
 void
-AlphaISA::initCPU(RegFile *regs)
+AlphaISA::initCPU(RegFile *regs, int cpuId)
 {
-    initIPRs(regs);
+    initIPRs(regs, cpuId);
     // CPU comes up with PAL regs enabled
     swap_palshadow(regs, true);
 
+    regs->intRegFile[16] = cpuId;
+    regs->intRegFile[0] = cpuId;
+
     regs->pc = regs->ipr[IPR_PAL_BASE] + fault_addr[Reset_Fault];
     regs->npc = regs->pc + sizeof(MachInst);
 }
@@ -116,13 +119,14 @@ const int AlphaISA::reg_redir[AlphaISA::NumIntRegs] = {
 //
 //
 void
-AlphaISA::initIPRs(RegFile *regs)
+AlphaISA::initIPRs(RegFile *regs, int cpuId)
 {
     uint64_t *ipr = regs->ipr;
 
     bzero((char *)ipr, NumInternalProcRegs * sizeof(InternalProcReg));
     ipr[IPR_PAL_BASE] = PalBase;
     ipr[IPR_MCSR] = 0x6;
+    ipr[IPR_PALtemp16] = cpuId;
 }
 
 
-- 
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