From 2c1e34431326381833de289b1d90f2427ba16c98 Mon Sep 17 00:00:00 2001 From: Dam Sunwoo Date: Mon, 22 Apr 2013 13:20:31 -0400 Subject: cpu: generate SimPoint basic block vector profiles This patch is based on http://reviews.m5sim.org/r/1474/ originally written by Mitch Hayenga. Basic block vectors are generated (simpoint.bb.gz in simout folder) based on start and end addresses of basic blocks. Some comments to the original patch are addressed and hooks are added to create and resume from checkpoints based on instruction counts dictated by external SimPoint analysis tools. SimPoint creation/resuming options will be implemented as a separate patch. --- configs/common/Options.py | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'configs/common') diff --git a/configs/common/Options.py b/configs/common/Options.py index 0c651b501..474da94f4 100644 --- a/configs/common/Options.py +++ b/configs/common/Options.py @@ -50,6 +50,10 @@ def addCommonOptions(parser): parser.add_option("--caches", action="store_true") parser.add_option("--l2cache", action="store_true") parser.add_option("--fastmem", action="store_true") + parser.add_option("--simpoint-profile", action="store_true", + help="Enable basic block profiling for SimPoints") + parser.add_option("--simpoint-interval", type="int", default=10000000, + help="SimPoint interval in num of instructions") parser.add_option("--clock", action="store", type="string", default='2GHz') parser.add_option("--num-dirs", type="int", default=1) parser.add_option("--num-l2caches", type="int", default=1) -- cgit v1.2.3