From c80af04d7df7586352841a65a4398baf21e0c122 Mon Sep 17 00:00:00 2001 From: Nilay Vaish Date: Thu, 1 Mar 2012 11:37:02 -0600 Subject: x86: Fix switching of CPUs This patch prevents creation of interrupt controller for cpus that will be switched in later --- configs/common/CacheConfig.py | 1 + 1 file changed, 1 insertion(+) (limited to 'configs/common') diff --git a/configs/common/CacheConfig.py b/configs/common/CacheConfig.py index b9192fcbf..009cb1bf6 100644 --- a/configs/common/CacheConfig.py +++ b/configs/common/CacheConfig.py @@ -70,6 +70,7 @@ def config_cache(options, system): PageTableWalkerCache()) else: system.cpu[i].addPrivateSplitL1Caches(icache, dcache) + system.cpu[i].createInterruptController() if options.l2cache: system.cpu[i].connectAllPorts(system.tol2bus, system.membus) else: -- cgit v1.2.3