From cb172d0332ecf4ff7f6329f1172d8e1cf78767e2 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Thu, 9 Nov 2006 18:22:46 -0500 Subject: Get SPARC to the point that it starts running. Add ability to load the ROM bin files, cleanup lockstep printing a bit Since we don't have a platform yet, you need to comment out the default responder stuff in Bus.py to make it work. SConstruct: Add TARGET_ISA to the list of environment variables that end up in the build_env for python configs/common/FSConfig.py: add a simple SPARC system to being testing with, you'll need to change makeLinuxAlphaSystem to makeSparcSystem in fs.py for now src/SConscript: add a raw file object, at least until we get more info about how to compile openboot properly src/arch/sparc/system.cc: src/arch/sparc/system.hh: add parameters for ROM files (OBP/Reset/Hypervisor), a ROM, load files into ROM src/base/loader/object_file.cc: src/base/loader/object_file.hh: add option to try raw when nothing works src/cpu/exetrace.cc: cleanup lockstep printing a little bit src/cpu/m5legion_interface.h: change the instruction to be 32 bits because it is src/mem/physical.cc: fix assert that doesn't work if memory starts somewhere above 0 src/python/m5/objects/BaseCPU.py: Add if statement to choose between sparc tlbs and alpha tlbs src/python/m5/objects/System.py: Add a sparc system that sets the rom addresses correctly src/python/m5/params.py: add the ability to add Addr() together --HG-- extra : convert_revision : bbbd8a56134f2dda2728091f740e2f7119b0c4af --- configs/common/FSConfig.py | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'configs/common') diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py index 05888b10b..546569f30 100644 --- a/configs/common/FSConfig.py +++ b/configs/common/FSConfig.py @@ -78,6 +78,27 @@ def makeLinuxAlphaSystem(mem_mode, mdesc = None): return self +def makeSparcSystem(mem_mode, mdesc = None): + self = SparcSystem() + if not mdesc: + # generic system + mdesc = SysConfig() + self.readfile = mdesc.script() + self.membus = Bus(bus_id=1) + self.physmem = PhysicalMemory(range = AddrRange(mdesc.mem())) + self.physmem.port = self.membus.port + self.rom.port = self.membus.port + self.intrctrl = IntrControl() + self.mem_mode = mem_mode + self.kernel = binary('vmlinux') + + self.reset_bin = binary('reset.bin') + self.hypervisor_bin = binary('q.bin') + self.openboot_bin = binary('openboot.bin') + + return self + + def makeDualRoot(testSystem, driveSystem, dumpfile): self = Root() self.testsys = testSystem -- cgit v1.2.3