From 3f1f16703d7d7fafb29fb47415b9aa959fb8eda7 Mon Sep 17 00:00:00 2001 From: Gedare Bloom Date: Fri, 17 Jun 2011 12:20:10 -0500 Subject: ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA. --- configs/example/fs.py | 1 + 1 file changed, 1 insertion(+) (limited to 'configs/example') diff --git a/configs/example/fs.py b/configs/example/fs.py index 420cf1f8b..b8f50fc90 100644 --- a/configs/example/fs.py +++ b/configs/example/fs.py @@ -137,6 +137,7 @@ elif buildEnv['TARGET_ISA'] == "arm": test_sys = makeArmSystem(test_mem_mode, options.machine_type, bm[0], bare_metal=options.bare_metal) + setWorkCountOptions(test_sys, options) else: fatal("incapable of building non-alpha or non-sparc full system!") -- cgit v1.2.3