From 93839380e7dc4799d234843d10329c03d38487fa Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Thu, 6 Jul 2006 14:41:01 -0400 Subject: Add default responder to bus Update configuration for new default responder on bus Update to devices to handle their own pci config space without pciconfigall Remove most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for Remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same bus:dev:func and interrupt Remove pciconfigspace from pci devices, and py files Add calcConfigAddr that returns address for config space based on bus/dev/function + offset configs/test/fs.py: Update configuration for new default responder on bus src/dev/ide_ctrl.cc: src/dev/ide_ctrl.hh: src/dev/ns_gige.cc: src/dev/ns_gige.hh: src/dev/pcidev.cc: src/dev/pcidev.hh: Update to handle it's own pci config space without pciconfigall src/dev/io_device.cc: src/dev/io_device.hh: change naming for pio port break out recvTiming into two functions to reuse code src/dev/pciconfigall.cc: src/dev/pciconfigall.hh: removing most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for src/dev/pcireg.h: add a max size for PCI config space (per PCI spec) src/dev/platform.cc: src/dev/platform.hh: remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same bus:dev:func and interrupt src/dev/sinic.cc: remove pciconfigspace as it's no longer a needed parameter src/dev/tsunami.cc: src/dev/tsunami.hh: src/dev/tsunami_pchip.cc: src/dev/tsunami_pchip.hh: add calcConfigAddr that returns address for config space based on bus/dev/function + offset (per PCI spec) src/mem/bus.cc: src/mem/bus.hh: src/python/m5/objects/Bus.py: add idea of default responder to bus src/python/m5/objects/Pci.py: add config port for pci devices add latency, bus and size parameters for pci config all (min is 8MB, max is 256MB see pci spec) --HG-- extra : convert_revision : 99db43b0a3a077f86611d6eaff6664a3885da7c9 --- configs/test/fs.py | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'configs/test/fs.py') diff --git a/configs/test/fs.py b/configs/test/fs.py index aa530dd55..e0dd38e41 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -1,6 +1,6 @@ import m5 from m5.objects import * -import os +import os,optparse,sys from SysPaths import * parser = optparse.OptionParser(option_list=m5.standardOptions) @@ -98,7 +98,7 @@ class SpecwebFilesetDisk(IdeDisk): class BaseTsunami(Tsunami): cchip = TsunamiCChip(pio_addr=0x801a0000000) pchip = TsunamiPChip(pio_addr=0x80180000000) - pciconfig = PciConfigAll(pio_addr=0x801fe000000) + pciconfig = PciConfigAll() fake_sm_chip = IsaFake(pio_addr=0x801fc000370) fake_uart1 = IsaFake(pio_addr=0x801fc0002f8) @@ -151,16 +151,18 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): tsunami = LinuxTsunami() tsunami.cchip.pio = magicbus.port tsunami.pchip.pio = magicbus.port - tsunami.pciconfig.pio = magicbus.port + tsunami.pciconfig.pio = magicbus.default tsunami.fake_sm_chip.pio = magicbus.port tsunami.ethernet.pio = magicbus.port tsunami.ethernet.dma = magicbus.port + tsunami.ethernet.config = magicbus.port tsunami.fake_uart1.pio = magicbus.port tsunami.fake_uart2.pio = magicbus.port tsunami.fake_uart3.pio = magicbus.port tsunami.fake_uart4.pio = magicbus.port tsunami.ide.pio = magicbus.port tsunami.ide.dma = magicbus.port + tsunami.ide.config = magicbus.port tsunami.fake_ppc.pio = magicbus.port tsunami.fake_OROM.pio = magicbus.port tsunami.fake_pnp_addr.pio = magicbus.port -- cgit v1.2.3 From aef232a942935e01c26522c20cc7fb3609075a7d Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Mon, 10 Jul 2006 12:07:21 -0400 Subject: Update FS configs to use cpu connectors for ports --HG-- extra : convert_revision : 1e2e503401f92c1f30e2e487d7aeed1c7c5b7ee4 --- configs/test/fs.py | 2 ++ 1 file changed, 2 insertions(+) (limited to 'configs/test/fs.py') diff --git a/configs/test/fs.py b/configs/test/fs.py index e0dd38e41..cd894ab73 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -190,6 +190,8 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): else: cpu = AtomicSimpleCPU() cpu.mem = magicbus2 + cpu.icache_port = magicbus2.port + cpu.dcache_port = magicbus2.port cpu.itb = AlphaITB() cpu.dtb = AlphaDTB() sim_console = SimConsole(listener=ConsoleListener(port=3456)) -- cgit v1.2.3 From 55ea050d4823ca294db94d6a1f7f2fc35177e044 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 10 Jul 2006 23:00:13 -0400 Subject: Migrate most of main() and and all option parsing to python configs/test/fs.py: configs/test/test.py: update for the new way that m5 deals with options src/python/SConscript: Compile AUTHORS, LICENSE, README, and RELEASE_NOTES into the python stuff. src/python/m5/__init__.py: redo the way options work. Move them all to main.py src/sim/main.cc: Migrate more functionality for main() into python. Namely option parsing src/python/m5/attrdict.py: A dictionary object that overrides attribute access to do item access. src/python/m5/main.py: The new location for M5's option parsing, and the main() routine to set up the simulation. --HG-- extra : convert_revision : c86b87a9f508bde1994088e23fd470c7753ee4c1 --- configs/test/fs.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'configs/test/fs.py') diff --git a/configs/test/fs.py b/configs/test/fs.py index cd894ab73..d191f7055 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -1,14 +1,14 @@ +import optparse, os, sys + import m5 from m5.objects import * -import os,optparse,sys from SysPaths import * -parser = optparse.OptionParser(option_list=m5.standardOptions) +parser = optparse.OptionParser() parser.add_option("-t", "--timing", action="store_true") (options, args) = parser.parse_args() -m5.setStandardOptions(options) if args: print "Error: script doesn't take any positional arguments" -- cgit v1.2.3 From a9ca36639f3e6d52284d947ab55c7c277918e686 Mon Sep 17 00:00:00 2001 From: Kevin Lim Date: Wed, 12 Jul 2006 17:17:17 -0400 Subject: Initial try of consolidating configuration files so they can be shared more easily, especially across regression tests and simple examples. configs/test/fs.py: Pull a lot of the default options out of the config file now that they are in the Python objects themselves. Also merge this file with the single_fs.py, allowing one file to be used for both. Previously they differed only by the system they instantiated. configs/test/test.py: Initial stab at consolidating configuration files so they aren't redundant between the regression tests and the simple examples. --HG-- extra : convert_revision : e8ae3de5a6d8864831f21089d4fdb8ec690e4731 --- configs/test/fs.py | 216 ++++++++++++----------------------------------------- 1 file changed, 48 insertions(+), 168 deletions(-) (limited to 'configs/test/fs.py') diff --git a/configs/test/fs.py b/configs/test/fs.py index cd894ab73..61fb97c64 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -2,10 +2,15 @@ import m5 from m5.objects import * import os,optparse,sys from SysPaths import * +from FullO3Config import * parser = optparse.OptionParser(option_list=m5.standardOptions) +parser.add_option("-d", "--detailed", action="store_true") parser.add_option("-t", "--timing", action="store_true") +parser.add_option("-m", "--maxtick", type="int") +parser.add_option("--dual", help="Run full system using dual systems", + action="store_true") (options, args) = parser.parse_args() m5.setStandardOptions(options) @@ -19,179 +24,52 @@ test_base = os.path.dirname(__file__) linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img')) -class IdeControllerPciData(PciConfigData): - VendorID = 0x8086 - DeviceID = 0x7111 - Command = 0x0 - Status = 0x280 - Revision = 0x0 - ClassCode = 0x01 - SubClassCode = 0x01 - ProgIF = 0x85 - BAR0 = 0x00000001 - BAR1 = 0x00000001 - BAR2 = 0x00000001 - BAR3 = 0x00000001 - BAR4 = 0x00000001 - BAR5 = 0x00000001 - InterruptLine = 0x1f - InterruptPin = 0x01 - BAR0Size = '8B' - BAR1Size = '4B' - BAR2Size = '8B' - BAR3Size = '4B' - BAR4Size = '16B' - -class SinicPciData(PciConfigData): - VendorID = 0x1291 - DeviceID = 0x1293 - Status = 0x0290 - SubClassCode = 0x00 - ClassCode = 0x02 - ProgIF = 0x00 - BAR0 = 0x00000000 - BAR1 = 0x00000000 - BAR2 = 0x00000000 - BAR3 = 0x00000000 - BAR4 = 0x00000000 - BAR5 = 0x00000000 - MaximumLatency = 0x34 - MinimumGrant = 0xb0 - InterruptLine = 0x1e - InterruptPin = 0x01 - BAR0Size = '64kB' - -class NSGigEPciData(PciConfigData): - VendorID = 0x100B - DeviceID = 0x0022 - Status = 0x0290 - SubClassCode = 0x00 - ClassCode = 0x02 - ProgIF = 0x00 - BAR0 = 0x00000001 - BAR1 = 0x00000000 - BAR2 = 0x00000000 - BAR3 = 0x00000000 - BAR4 = 0x00000000 - BAR5 = 0x00000000 - MaximumLatency = 0x34 - MinimumGrant = 0xb0 - InterruptLine = 0x1e - InterruptPin = 0x01 - BAR0Size = '256B' - BAR1Size = '4kB' - -class LinuxRootDisk(IdeDisk): - raw_image = RawDiskImage(image_file=linux_image, read_only=True) - image = CowDiskImage(child=Parent.raw_image, read_only=False) - -class LinuxSwapDisk(IdeDisk): - raw_image = RawDiskImage(image_file = disk('linux-bigswap2.img'), - read_only=True) - image = CowDiskImage(child = Parent.raw_image, read_only=False) - -class SpecwebFilesetDisk(IdeDisk): - raw_image = RawDiskImage(image_file = disk('specweb-fileset.img'), - read_only=True) - image = CowDiskImage(child = Parent.raw_image, read_only=False) +class CowIdeDisk(IdeDisk): + image = CowDiskImage(child=RawDiskImage(read_only=True), + read_only=False) + + def childImage(self, ci): + self.image.child.image_file = ci class BaseTsunami(Tsunami): - cchip = TsunamiCChip(pio_addr=0x801a0000000) - pchip = TsunamiPChip(pio_addr=0x80180000000) - pciconfig = PciConfigAll() - fake_sm_chip = IsaFake(pio_addr=0x801fc000370) - - fake_uart1 = IsaFake(pio_addr=0x801fc0002f8) - fake_uart2 = IsaFake(pio_addr=0x801fc0003e8) - fake_uart3 = IsaFake(pio_addr=0x801fc0002e8) - fake_uart4 = IsaFake(pio_addr=0x801fc0003f0) - - fake_ppc = IsaFake(pio_addr=0x801fc0003bc) - - fake_OROM = IsaFake(pio_addr=0x800000a0000, pio_size=0x60000) - - fake_pnp_addr = IsaFake(pio_addr=0x801fc000279) - fake_pnp_write = IsaFake(pio_addr=0x801fc000a79) - fake_pnp_read0 = IsaFake(pio_addr=0x801fc000203) - fake_pnp_read1 = IsaFake(pio_addr=0x801fc000243) - fake_pnp_read2 = IsaFake(pio_addr=0x801fc000283) - fake_pnp_read3 = IsaFake(pio_addr=0x801fc0002c3) - fake_pnp_read4 = IsaFake(pio_addr=0x801fc000303) - fake_pnp_read5 = IsaFake(pio_addr=0x801fc000343) - fake_pnp_read6 = IsaFake(pio_addr=0x801fc000383) - fake_pnp_read7 = IsaFake(pio_addr=0x801fc0003c3) - - fake_ata0 = IsaFake(pio_addr=0x801fc0001f0) - fake_ata1 = IsaFake(pio_addr=0x801fc000170) - - fb = BadDevice(pio_addr=0x801fc0003d0, devicename='FrameBuffer') - io = TsunamiIO(pio_addr=0x801fc000000) - uart = Uart8250(pio_addr=0x801fc0003f8) ethernet = NSGigE(configdata=NSGigEPciData(), pci_bus=0, pci_dev=1, pci_func=0) etherint = NSGigEInt(device=Parent.ethernet) - console = AlphaConsole(pio_addr=0x80200000000, disk=Parent.simple_disk) - -class LinuxTsunami(BaseTsunami): - disk0 = LinuxRootDisk(driveID='master') - disk1 = SpecwebFilesetDisk(driveID='slave') - disk2 = LinuxSwapDisk(driveID='master') - ide = IdeController(disks=[Parent.disk0, Parent.disk1, Parent.disk2], - configdata=IdeControllerPciData(), + ide = IdeController(disks=[Parent.disk0, Parent.disk2], pci_func=0, pci_dev=0, pci_bus=0) class MyLinuxAlphaSystem(LinuxAlphaSystem): - magicbus = Bus(bus_id=0) - magicbus2 = Bus(bus_id=1) + iobus = Bus(bus_id=0) + membus = Bus(bus_id=1) bridge = Bridge() physmem = PhysicalMemory(range = AddrRange('128MB')) - bridge.side_a = magicbus.port - bridge.side_b = magicbus2.port - physmem.port = magicbus2.port - tsunami = LinuxTsunami() - tsunami.cchip.pio = magicbus.port - tsunami.pchip.pio = magicbus.port - tsunami.pciconfig.pio = magicbus.default - tsunami.fake_sm_chip.pio = magicbus.port - tsunami.ethernet.pio = magicbus.port - tsunami.ethernet.dma = magicbus.port - tsunami.ethernet.config = magicbus.port - tsunami.fake_uart1.pio = magicbus.port - tsunami.fake_uart2.pio = magicbus.port - tsunami.fake_uart3.pio = magicbus.port - tsunami.fake_uart4.pio = magicbus.port - tsunami.ide.pio = magicbus.port - tsunami.ide.dma = magicbus.port - tsunami.ide.config = magicbus.port - tsunami.fake_ppc.pio = magicbus.port - tsunami.fake_OROM.pio = magicbus.port - tsunami.fake_pnp_addr.pio = magicbus.port - tsunami.fake_pnp_write.pio = magicbus.port - tsunami.fake_pnp_read0.pio = magicbus.port - tsunami.fake_pnp_read1.pio = magicbus.port - tsunami.fake_pnp_read2.pio = magicbus.port - tsunami.fake_pnp_read3.pio = magicbus.port - tsunami.fake_pnp_read4.pio = magicbus.port - tsunami.fake_pnp_read5.pio = magicbus.port - tsunami.fake_pnp_read6.pio = magicbus.port - tsunami.fake_pnp_read7.pio = magicbus.port - tsunami.fake_ata0.pio = magicbus.port - tsunami.fake_ata1.pio = magicbus.port - tsunami.fb.pio = magicbus.port - tsunami.io.pio = magicbus.port - tsunami.uart.pio = magicbus.port - tsunami.console.pio = magicbus.port - raw_image = RawDiskImage(image_file=disk('linux-latest.img'), - read_only=True) - simple_disk = SimpleDisk(disk=Parent.raw_image) + bridge.side_a = iobus.port + bridge.side_b = membus.port + physmem.port = membus.port + disk0 = CowIdeDisk(driveID='master') + disk2 = CowIdeDisk(driveID='master') + disk0.childImage(linux_image) + disk2.childImage(disk('linux-bigswap2.img')) + tsunami = BaseTsunami() + tsunami.attachIO(iobus) + tsunami.ide.pio = iobus.port + tsunami.ide.dma = iobus.port + tsunami.ide.config = iobus.port + tsunami.ethernet.pio = iobus.port + tsunami.ethernet.dma = iobus.port + tsunami.ethernet.config = iobus.port + simple_disk = SimpleDisk(disk=RawDiskImage(image_file = linux_image, + read_only = True)) intrctrl = IntrControl() - if options.timing: + if options.detailed: + cpu = DetailedO3CPU() + elif options.timing: cpu = TimingSimpleCPU() else: cpu = AtomicSimpleCPU() - cpu.mem = magicbus2 - cpu.icache_port = magicbus2.port - cpu.dcache_port = magicbus2.port + cpu.mem = membus + cpu.icache_port = membus.port + cpu.dcache_port = membus.port cpu.itb = AlphaITB() cpu.dtb = AlphaDTB() sim_console = SimConsole(listener=ConsoleListener(port=3456)) @@ -199,14 +77,10 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): pal = binary('ts_osfpal') console = binary('console') boot_osflags = 'root=/dev/hda1 console=ttyS0' -# readfile = os.path.join(test_base, 'halt.sh') - - -class TsunamiRoot(System): +class TsunamiRoot(Root): pass - def DualRoot(clientSystem, serverSystem): self = Root() self.client = clientSystem @@ -219,12 +93,18 @@ def DualRoot(clientSystem, serverSystem): self.clock = '5GHz' return self -root = DualRoot( - MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')), - MyLinuxAlphaSystem(readfile=script('netperf-server.rcS'))) +if options.dual: + root = DualRoot( + MyLinuxAlphaSystem(readfile=script('netperf-stream-nt-client.rcS')), + MyLinuxAlphaSystem(readfile=script('netperf-server.rcS'))) +else: + root = TsunamiRoot(clock = '2GHz', system = MyLinuxAlphaSystem()) m5.instantiate(root) -exit_event = m5.simulate() +if options.maxtick: + exit_event = m5.simulate(options.maxtick) +else: + exit_event = m5.simulate() print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause() -- cgit v1.2.3 From c368ff0bd8d36ba001f523bd03f56f99d9ecd452 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Thu, 13 Jul 2006 15:48:17 -0400 Subject: add system.mem_mode = ['timing', 'atomic'] update scripts acordingly configs/test/SysPaths.py: new syspaths from nate, this one allows you to set script, binary, and disk paths like system.dir = 'aouaou' in your script configs/test/fs.py: update for system mem_mode Put small checkpoint example Make clock 1THz configs/test/test.py: src/arch/alpha/freebsd/system.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/system.cc: src/arch/alpha/tru64/system.cc: src/arch/sparc/system.cc: src/python/m5/objects/System.py: src/sim/system.cc: src/sim/system.hh: update for system mem_mode src/dev/io_device.cc: Use time returned from sendAtomic to delay --HG-- extra : convert_revision : 67eedb3c84ab2584613faf88a534e793926fc92f --- configs/test/fs.py | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'configs/test/fs.py') diff --git a/configs/test/fs.py b/configs/test/fs.py index d191f7055..41c3f8cc0 100644 --- a/configs/test/fs.py +++ b/configs/test/fs.py @@ -17,6 +17,8 @@ if args: # Base for tests is directory containing this file. test_base = os.path.dirname(__file__) +script.dir = '/z/saidi/work/m5.newmem/configs/boot' + linux_image = env.get('LINUX_IMAGE', disk('linux-latest.img')) class IdeControllerPciData(PciConfigData): @@ -187,6 +189,7 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): intrctrl = IntrControl() if options.timing: cpu = TimingSimpleCPU() + mem_mode = 'timing' else: cpu = AtomicSimpleCPU() cpu.mem = magicbus2 @@ -194,6 +197,7 @@ class MyLinuxAlphaSystem(LinuxAlphaSystem): cpu.dcache_port = magicbus2.port cpu.itb = AlphaITB() cpu.dtb = AlphaDTB() + cpu.clock = '2GHz' sim_console = SimConsole(listener=ConsoleListener(port=3456)) kernel = binary('vmlinux') pal = binary('ts_osfpal') @@ -216,7 +220,7 @@ def DualRoot(clientSystem, serverSystem): self.etherlink = EtherLink(int1 = Parent.client.tsunami.etherint[0], int2 = Parent.server.tsunami.etherint[0], dump = Parent.etherdump) - self.clock = '5GHz' + self.clock = '1THz' return self root = DualRoot( @@ -225,6 +229,14 @@ root = DualRoot( m5.instantiate(root) +#exit_event = m5.simulate(2600000000000) +#if exit_event.getCause() != "user interrupt received": +# m5.checkpoint(root, 'cpt') +# exit_event = m5.simulate(300000000000) +# if exit_event.getCause() != "user interrupt received": +# m5.checkpoint(root, 'cptA') + + exit_event = m5.simulate() print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause() -- cgit v1.2.3