From 11b725c19da4d08ae471678f6da867c67e3c15b5 Mon Sep 17 00:00:00 2001 From: Brad Beckmann Date: Tue, 10 Jul 2012 22:51:53 -0700 Subject: ruby: changes how Topologies are created Instead of just passing a list of controllers to the makeTopology function in src/mem/ruby/network/topologies/.py we pass in a function pointer which knows how to make the topology, possibly with some extra state set in the configs/ruby/.py file. Thus, we can move all of the files from network/topologies to configs/topologies. A new class BaseTopology is added which all topologies in configs/topologies must inheirit from and follow its API. --HG-- rename : src/mem/ruby/network/topologies/Crossbar.py => configs/topologies/Crossbar.py rename : src/mem/ruby/network/topologies/Mesh.py => configs/topologies/Mesh.py rename : src/mem/ruby/network/topologies/MeshDirCorners.py => configs/topologies/MeshDirCorners.py rename : src/mem/ruby/network/topologies/Pt2Pt.py => configs/topologies/Pt2Pt.py rename : src/mem/ruby/network/topologies/Torus.py => configs/topologies/Torus.py --- configs/topologies/BaseTopology.py | 51 +++++++++++++ configs/topologies/Cluster.py | 117 ++++++++++++++++++++++++++++++ configs/topologies/Crossbar.py | 56 +++++++++++++++ configs/topologies/Mesh.py | 114 +++++++++++++++++++++++++++++ configs/topologies/MeshDirCorners.py | 134 +++++++++++++++++++++++++++++++++++ configs/topologies/Pt2Pt.py | 60 ++++++++++++++++ configs/topologies/Torus.py | 126 ++++++++++++++++++++++++++++++++ 7 files changed, 658 insertions(+) create mode 100644 configs/topologies/BaseTopology.py create mode 100644 configs/topologies/Cluster.py create mode 100644 configs/topologies/Crossbar.py create mode 100644 configs/topologies/Mesh.py create mode 100644 configs/topologies/MeshDirCorners.py create mode 100644 configs/topologies/Pt2Pt.py create mode 100644 configs/topologies/Torus.py (limited to 'configs/topologies') diff --git a/configs/topologies/BaseTopology.py b/configs/topologies/BaseTopology.py new file mode 100644 index 000000000..114a29f19 --- /dev/null +++ b/configs/topologies/BaseTopology.py @@ -0,0 +1,51 @@ +# Copyright (c) 2012 Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Jason Power + + +class BaseTopology(object): + description = "BaseTopology" + + def __init__(self): + """ When overriding place any objects created in + configs/ruby/.py that are needed in + makeTopology (below) here. The minimum is usually + all of the controllers created in the above file. + """ + + def makeTopology(self, options, IntLink, ExtLink, Router): + """ Called from src/mem/ruby/network/topologies/TopologyCreatory.py + The return value is ( list(Router), list(IntLink), list(ExtLink)) + The API of this function cannot change when subclassing!! + Any additional information needed to create this topology should + be passed into the constructor when it's instantiated in + configs/ruby/.py + """ + print "BaseTopology should have been overridden in a sub class!!" + import sys + sys.exit(1) + diff --git a/configs/topologies/Cluster.py b/configs/topologies/Cluster.py new file mode 100644 index 000000000..e5c6dac0e --- /dev/null +++ b/configs/topologies/Cluster.py @@ -0,0 +1,117 @@ +# Copyright (c) 2012 Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Jason Power + + +from BaseTopology import BaseTopology + +class Cluster(BaseTopology): + """ A cluster is a group of nodes which are all one hop from eachother + Clusters can also contain other clusters + When creating this kind of topology, return a single cluster (usually + the root cluster) from create_system in configs/ruby/.py + """ + + _num_int_links = 0 + _num_ext_links = 0 + _num_routers = 0 + + # Below methods for auto counting + @classmethod + def num_int_links(cls): + cls._num_int_links += 1 + return cls._num_int_links - 1 + @classmethod + def num_ext_links(cls): + cls._num_ext_links += 1 + return cls._num_ext_links - 1 + @classmethod + def num_routers(cls): + cls._num_routers += 1 + return cls._num_routers - 1 + + def __init__(self, intBW=0, extBW=0, intLatency=0, extLatency=0): + """ internalBandwidth is bandwidth of all links within the cluster + externalBandwidth is bandwidth from this cluster to any cluster + connecting to it. + internal/externalLatency are similar + **** When creating a cluster with sub-clusters, the sub-cluster + external bandwidth overrides the internal bandwidth of the + super cluster + """ + self.nodes = [] + self.router = None # created in makeTopology + self.intBW = intBW + self.extBW = extBW + self.intLatency = intLatency + self.extLatency = extLatency + + def add(self, node): + self.nodes.append(node) + + def makeTopology(self, options, IntLink, ExtLink, Router): + """ Recursively make all of the links and routers + """ + routers = [] + int_links = [] + ext_links = [] + + # make a router to connect all of the nodes + self.router = Router(router_id=self.num_routers()) + routers.append(self.router) + for node in self.nodes: + if type(node) == Cluster: + subRouters, subIntLinks, subExtLinks = node.makeTopology(options, IntLink, ExtLink, Router) + routers += subRouters + int_links += subIntLinks + ext_links += subExtLinks + + # connect this cluster to the router + link = IntLink(link_id=self.num_int_links(), node_a=self.router, node_b=node.router) + if node.extBW: + link.bandwidth_factor = node.extBW + elif self.intBW: # if there is an interanl b/w for this node and no ext b/w to override + link.bandwidth_factor = self.intBW + + if node.extLatency: + link.latency = node.extLatency + elif self.intLatency: + link.latency = self.intLatency + + int_links.append(link) + else: + # node is just a controller connect it to the router via a ext_link + link = ExtLink(link_id=self.num_ext_links(), ext_node=node, int_node=self.router) + if self.intBW: + link.bandwidth_factor = self.intBW + if self.intLatency: + link.latency = self.intLatency + + ext_links.append(link) + + return routers, int_links, ext_links + diff --git a/configs/topologies/Crossbar.py b/configs/topologies/Crossbar.py new file mode 100644 index 000000000..e66492922 --- /dev/null +++ b/configs/topologies/Crossbar.py @@ -0,0 +1,56 @@ +# Copyright (c) 2010 Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Steve Reinhardt + +from m5.params import * +from m5.objects import * + +from BaseTopology import BaseTopology + +class Crossbar(BaseTopology): + description='Crossbar' + + def __init__(self, controllers): + self.nodes = controllers + + def makeTopology(self, options, IntLink, ExtLink, Router): + # Create an individual router for each controller plus one more for the + # centralized crossbar. The large numbers of routers are needed because + # external links do not model outgoing bandwidth in the simple network, but + # internal links do. + + routers = [Router(router_id=i) for i in range(len(self.nodes)+1)] + ext_links = [ExtLink(link_id=i, ext_node=n, int_node=routers[i]) + for (i, n) in enumerate(self.nodes)] + link_count = len(self.nodes) + xbar = routers[len(self.nodes)] # the crossbar router is the last router created + int_links = [IntLink(link_id=(link_count+i), + node_a=routers[i], node_b=xbar) + for i in range(len(self.nodes))] + + return routers, int_links, ext_links + diff --git a/configs/topologies/Mesh.py b/configs/topologies/Mesh.py new file mode 100644 index 000000000..b1f2e6751 --- /dev/null +++ b/configs/topologies/Mesh.py @@ -0,0 +1,114 @@ +# Copyright (c) 2010 Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Brad Beckmann + +from m5.params import * +from m5.objects import * + +from BaseTopology import BaseTopology + +class Mesh(BaseTopology): + description='Mesh' + + def __init__(self, controllers): + self.nodes = controllers + + # Makes a generic mesh assuming an equal number of cache and directory cntrls + + def makeTopology(self, options, IntLink, ExtLink, Router): + nodes = self.nodes + + num_routers = options.num_cpus + num_rows = options.mesh_rows + + # There must be an evenly divisible number of cntrls to routers + # Also, obviously the number or rows must be <= the number of routers + cntrls_per_router, remainder = divmod(len(nodes), num_routers) + assert(num_rows <= num_routers) + num_columns = int(num_routers / num_rows) + assert(num_columns * num_rows == num_routers) + + # Create the routers in the mesh + routers = [Router(router_id=i) for i in range(num_routers)] + + # link counter to set unique link ids + link_count = 0 + + # Add all but the remainder nodes to the list of nodes to be uniformly + # distributed across the network. + network_nodes = [] + remainder_nodes = [] + for node_index in xrange(len(nodes)): + if node_index < (len(nodes) - remainder): + network_nodes.append(nodes[node_index]) + else: + remainder_nodes.append(nodes[node_index]) + + # Connect each node to the appropriate router + ext_links = [] + for (i, n) in enumerate(network_nodes): + cntrl_level, router_id = divmod(i, num_routers) + assert(cntrl_level < cntrls_per_router) + ext_links.append(ExtLink(link_id=link_count, ext_node=n, + int_node=routers[router_id])) + link_count += 1 + + # Connect the remainding nodes to router 0. These should only be + # DMA nodes. + for (i, node) in enumerate(remainder_nodes): + assert(node.type == 'DMA_Controller') + assert(i < remainder) + ext_links.append(ExtLink(link_id=link_count, ext_node=node, + int_node=routers[0])) + link_count += 1 + + # Create the mesh links. First row (east-west) links then column + # (north-south) links + int_links = [] + for row in xrange(num_rows): + for col in xrange(num_columns): + if (col + 1 < num_columns): + east_id = col + (row * num_columns) + west_id = (col + 1) + (row * num_columns) + int_links.append(IntLink(link_id=link_count, + node_a=routers[east_id], + node_b=routers[west_id], + weight=1)) + link_count += 1 + + for col in xrange(num_columns): + for row in xrange(num_rows): + if (row + 1 < num_rows): + north_id = col + (row * num_columns) + south_id = col + ((row + 1) * num_columns) + int_links.append(IntLink(link_id=link_count, + node_a=routers[north_id], + node_b=routers[south_id], + weight=2)) + link_count += 1 + + return routers, int_links, ext_links diff --git a/configs/topologies/MeshDirCorners.py b/configs/topologies/MeshDirCorners.py new file mode 100644 index 000000000..23bcde5a6 --- /dev/null +++ b/configs/topologies/MeshDirCorners.py @@ -0,0 +1,134 @@ +# Copyright (c) 2010 Advanced Micro Devices, Inc. +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Brad Beckmann + +from m5.params import * +from m5.objects import * + +from BaseTopology import BaseTopology + +class MeshDirCorners(BaseTopology): + description='MeshDirCorners' + + def __init__(self, controllers): + self.nodes = controllers + + # This file contains a special network creation function. This + # networks is not general and will only work with specific system + # configurations. The network specified is similar to GEMS old file + # specified network. + + def makeTopology(self, options, IntLink, ExtLink, Router): + nodes = self.nodes + + num_routers = options.num_cpus + num_rows = options.mesh_rows + + # First determine which nodes are cache cntrls vs. dirs vs. dma + cache_nodes = [] + dir_nodes = [] + dma_nodes = [] + for node in nodes: + if node.type == 'L1Cache_Controller' or \ + node.type == 'L2Cache_Controller': + cache_nodes.append(node) + elif node.type == 'Directory_Controller': + dir_nodes.append(node) + elif node.type == 'DMA_Controller': + dma_nodes.append(node) + + # Obviously the number or rows must be <= the number of routers + # and evenly divisible. Also the number of caches must be a + # multiple of the number of routers and the number of directories + # must be four. + assert(num_rows <= num_routers) + num_columns = int(num_routers / num_rows) + assert(num_columns * num_rows == num_routers) + caches_per_router, remainder = divmod(len(cache_nodes), num_routers) + assert(remainder == 0) + assert(len(dir_nodes) == 4) + + # Create the routers in the mesh + routers = [Router(router_id=i) for i in range(num_routers)] + + # link counter to set unique link ids + link_count = 0 + + # Connect each cache controller to the appropriate router + ext_links = [] + for (i, n) in enumerate(cache_nodes): + cntrl_level, router_id = divmod(i, num_routers) + assert(cntrl_level < caches_per_router) + ext_links.append(ExtLink(link_id=link_count, ext_node=n, + int_node=routers[router_id])) + link_count += 1 + + # Connect the dir nodes to the corners. + ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[0], + int_node=routers[0])) + link_count += 1 + ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[1], + int_node=routers[num_columns - 1])) + link_count += 1 + ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[2], + int_node=routers[num_routers - num_columns])) + link_count += 1 + ext_links.append(ExtLink(link_id=link_count, ext_node=dir_nodes[3], + int_node=routers[num_routers - 1])) + link_count += 1 + + # Connect the dma nodes to router 0. These should only be DMA nodes. + for (i, node) in enumerate(dma_nodes): + assert(node.type == 'DMA_Controller') + ext_links.append(ExtLink(link_id=link_count, ext_node=node, int_node=routers[0])) + + # Create the mesh links. First row (east-west) links then column + # (north-south) links + int_links = [] + for row in xrange(num_rows): + for col in xrange(num_columns): + if (col + 1 < num_columns): + east_id = col + (row * num_columns) + west_id = (col + 1) + (row * num_columns) + int_links.append(IntLink(link_id=link_count, + node_a=routers[east_id], + node_b=routers[west_id], + weight=1)) + link_count += 1 + + for col in xrange(num_columns): + for row in xrange(num_rows): + if (row + 1 < num_rows): + north_id = col + (row * num_columns) + south_id = col + ((row + 1) * num_columns) + int_links.append(IntLink(link_id=link_count, + node_a=routers[north_id], + node_b=routers[south_id], + weight=2)) + link_count += 1 + + return routers, int_links, ext_links diff --git a/configs/topologies/Pt2Pt.py b/configs/topologies/Pt2Pt.py new file mode 100644 index 000000000..360811272 --- /dev/null +++ b/configs/topologies/Pt2Pt.py @@ -0,0 +1,60 @@ +# Copyright (c) 2011 Advanced Micro Devices, Inc. +# 2011 Massachusetts Institute of Technology +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Brad Beckmann +# Tushar Krishna + +from m5.params import * +from m5.objects import * + +from BaseTopology import BaseTopology + +class Pt2Pt(BaseTopology): + description='Pt2Pt' + + def __init__(self, controllers): + self.nodes = controllers + + def makeTopology(self, options, IntLink, ExtLink, Router): + nodes = self.nodes + # Create an individual router for each controller, and connect all to all. + + routers = [Router(router_id=i) for i in range(len(nodes))] + ext_links = [ExtLink(link_id=i, ext_node=n, int_node=routers[i]) + for (i, n) in enumerate(nodes)] + link_count = len(nodes) + + int_links = [] + for i in xrange(len(nodes)): + for j in xrange(len(nodes)): + if (i != j): + link_count += 1 + int_links.append(IntLink(link_id=link_count, + node_a=routers[i], + node_b=routers[j])) + + return routers, int_links, ext_links diff --git a/configs/topologies/Torus.py b/configs/topologies/Torus.py new file mode 100644 index 000000000..7fbcbf55b --- /dev/null +++ b/configs/topologies/Torus.py @@ -0,0 +1,126 @@ +# Copyright (c) 2011 Advanced Micro Devices, Inc. +# 2011 Massachusetts Institute of Technology +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Brad Beckmann +# Tushar Krishna + +from m5.params import * +from m5.objects import * + +from BaseTopology import BaseTopology + +class Torus(BaseTopology): + description='Torus' + + def __init__(self, controllers): + self.nodes = controllers + + # Makes a generic torus assuming an equal number of cache and directory cntrls + # Assuming a folded-torus on-chip layout (as shown on gem5 wiki). + # All links (including the wrap-around ones) are of equal length, double that + # of a mesh. Thus, each link is assigned a latency of 2 cycles. + + def makeTopology(self, options, IntLink, ExtLink, Router): + nodes = self.nodes + + num_routers = options.num_cpus + num_rows = options.mesh_rows + + # There must be an evenly divisible number of cntrls to routers + # Also, obviously the number or rows must be <= the number of routers + cntrls_per_router, remainder = divmod(len(nodes), num_routers) + assert(num_rows <= num_routers) + num_columns = int(num_routers / num_rows) + assert(num_columns * num_rows == num_routers) + + # Create the routers in the torus + routers = [Router(router_id=i) for i in range(num_routers)] + + # link counter to set unique link ids + link_count = 0 + + # Add all but the remainder nodes to the list of nodes to be uniformly + # distributed across the network. + network_nodes = [] + remainder_nodes = [] + for node_index in xrange(len(nodes)): + if node_index < (len(nodes) - remainder): + network_nodes.append(nodes[node_index]) + else: + remainder_nodes.append(nodes[node_index]) + + # Connect each node to the appropriate router + ext_links = [] + for (i, n) in enumerate(network_nodes): + cntrl_level, router_id = divmod(i, num_routers) + assert(cntrl_level < cntrls_per_router) + ext_links.append(ExtLink(link_id=link_count, ext_node=n, + int_node=routers[router_id])) + link_count += 1 + + # Connect the remainding nodes to router 0. These should only be + # DMA nodes. + for (i, node) in enumerate(remainder_nodes): + assert(node.type == 'DMA_Controller') + assert(i < remainder) + ext_links.append(ExtLink(link_id=link_count, ext_node=node, + int_node=routers[0])) + link_count += 1 + + # Create the torus links. First row (east-west) links then column + # (north-south) links + # column links are given higher weights to implement XY routing + int_links = [] + for row in xrange(num_rows): + for col in xrange(num_columns): + west_id = col + (row * num_columns) + if (col + 1 < num_columns): + east_id = (col + 1) + (row * num_columns) + else: + east_id = (row * num_columns) + int_links.append(IntLink(link_id=link_count, + node_a=routers[east_id], + node_b=routers[west_id], + latency=2, + weight=1)) + link_count += 1 + + for col in xrange(num_columns): + for row in xrange(num_rows): + north_id = col + (row * num_columns) + if (row + 1 < num_rows): + south_id = col + ((row + 1) * num_columns) + else: + south_id = col + int_links.append(IntLink(link_id=link_count, + node_a=routers[north_id], + node_b=routers[south_id], + latency=2, + weight=2)) + link_count += 1 + + return routers, int_links, ext_links -- cgit v1.2.3