From fbdeb6031664d71e19a25f51b6ee882d803dac30 Mon Sep 17 00:00:00 2001 From: Andreas Hansson Date: Wed, 10 Feb 2016 04:08:24 -0500 Subject: mem: Deduce if cache should forward snoops This patch changes how the cache determines if snoops should be forwarded from the memory side to the CPU side. Instead of having a parameter, the cache now looks at the port connected on the CPU side, and if it is a snooping port, then snoops are forwarded. Less error prone, and less parameters to worry about. The patch also tidies up the CPU classes to ensure that their I-side port is not snooping by removing overrides to the snoop request handler, such that snoop requests will panic via the default MasterPort implement --- configs/common/Caches.py | 3 +-- configs/common/O3_ARM_v7a.py | 2 -- 2 files changed, 1 insertion(+), 4 deletions(-) (limited to 'configs') diff --git a/configs/common/Caches.py b/configs/common/Caches.py index c65910e23..af1dee626 100644 --- a/configs/common/Caches.py +++ b/configs/common/Caches.py @@ -76,7 +76,6 @@ class IOCache(Cache): mshrs = 20 size = '1kB' tgts_per_mshr = 12 - forward_snoops = False class PageTableWalkerCache(Cache): assoc = 2 @@ -85,7 +84,7 @@ class PageTableWalkerCache(Cache): mshrs = 10 size = '1kB' tgts_per_mshr = 12 - forward_snoops = False + # the x86 table walker actually writes to the table-walker cache if buildEnv['TARGET_ISA'] == 'x86': is_read_only = False diff --git a/configs/common/O3_ARM_v7a.py b/configs/common/O3_ARM_v7a.py index 103158290..a38273c10 100644 --- a/configs/common/O3_ARM_v7a.py +++ b/configs/common/O3_ARM_v7a.py @@ -149,7 +149,6 @@ class O3_ARM_v7a_ICache(Cache): tgts_per_mshr = 8 size = '32kB' assoc = 2 - forward_snoops = False is_read_only = True # Writeback clean lines as well writeback_clean = True @@ -176,7 +175,6 @@ class O3_ARM_v7aWalkCache(Cache): size = '1kB' assoc = 8 write_buffers = 16 - forward_snoops = False is_read_only = True # Writeback clean lines as well writeback_clean = True -- cgit v1.2.3