From cbfbb7bc56630ddefb95625a6da87b3c1da9599d Mon Sep 17 00:00:00 2001 From: Kevin Lim Date: Wed, 2 Aug 2006 12:05:34 -0400 Subject: Updates to bring CPU portion of m5 up-to-date with newmem. --HG-- extra : convert_revision : 00e6eefb24e6ffd9c7c5d8165db26fbf6199fdc4 --- cpu/o3/commit.hh | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'cpu/o3/commit.hh') diff --git a/cpu/o3/commit.hh b/cpu/o3/commit.hh index d93822394..b153effc4 100644 --- a/cpu/o3/commit.hh +++ b/cpu/o3/commit.hh @@ -160,10 +160,6 @@ class DefaultCommit /** Sets the pointer to the queue coming from IEW. */ void setIEWQueue(TimeBuffer *iq_ptr); - void setFetchStage(Fetch *fetch_stage); - - Fetch *fetchStage; - /** Sets the pointer to the IEW stage. */ void setIEWStage(IEW *iew_stage); @@ -367,11 +363,6 @@ class DefaultCommit */ unsigned renameWidth; - /** IEW width, in instructions. Used so ROB knows how many - * instructions to get from the IEW instruction queue. - */ - unsigned iewWidth; - /** Commit width, in instructions. */ unsigned commitWidth; @@ -392,10 +383,6 @@ class DefaultCommit */ Tick trapLatency; - Tick fetchTrapLatency; - - Tick fetchFaultTick; - /** The commit PC of each thread. Refers to the instruction that * is currently being processed/committed. */ -- cgit v1.2.3