From 6c386396faef6f48f2d01911e59d09b192bf3c45 Mon Sep 17 00:00:00 2001
From: Kevin Lim <ktlim@umich.edu>
Date: Tue, 23 May 2006 16:57:14 -0400
Subject: Code cleanup.

cpu/base_dyn_inst.hh:
    Code cleanup

--HG--
extra : convert_revision : 501c03f8e4346ffbcb545ddeee30c1f8ded9baa7
---
 cpu/ozone/dyn_inst.hh | 52 +--------------------------------------------------
 1 file changed, 1 insertion(+), 51 deletions(-)

(limited to 'cpu/ozone/dyn_inst.hh')

diff --git a/cpu/ozone/dyn_inst.hh b/cpu/ozone/dyn_inst.hh
index f251c28ea..5d48bb361 100644
--- a/cpu/ozone/dyn_inst.hh
+++ b/cpu/ozone/dyn_inst.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2005 The Regents of The University of Michigan
+ * Copyright (c) 2005-2006 The Regents of The University of Michigan
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -52,8 +52,6 @@ class OzoneDynInst : public BaseDynInst<Impl>
     // Typedef for DynInstPtr.  This is really just a RefCountingPtr<OoODynInst>.
     typedef typename Impl::DynInstPtr DynInstPtr;
 
-//    typedef typename Impl::BranchPred::BPredInfo BPredInfo;
-
     typedef TheISA::ExtMachInst ExtMachInst;
     typedef TheISA::MachInst MachInst;
     typedef TheISA::MiscReg MiscReg;
@@ -107,12 +105,6 @@ class OzoneDynInst : public BaseDynInst<Impl>
     // up.  In the future, you only really need a counter.
     bool memDepReady() { return srcMemInsts.empty(); }
 
-//    void setBPredInfo(const BPredInfo &bp_info) { bpInfo = bp_info; }
-
-//    BPredInfo &getBPredInfo() { return bpInfo; }
-
-//    OzoneXC *thread;
-
   private:
     void initInstPtrs();
 
@@ -133,20 +125,12 @@ class OzoneDynInst : public BaseDynInst<Impl>
      */
     DynInstPtr prevDestInst[MaxInstSrcRegs];
 
-//    BPredInfo bpInfo;
-
   public:
 
     Fault initiateAcc();
 
     Fault completeAcc();
-/*
-    template <class T>
-    Fault read(Addr addr, T &data, unsigned flags);
 
-    template <class T>
-    Fault write(T data, Addr addr, unsigned flags, uint64_t *res);
-*/
     // The register accessor methods provide the index of the
     // instruction's operand (e.g., 0 or 1), not the architectural
     // register index, to simplify the implementation of register
@@ -244,38 +228,4 @@ class OzoneDynInst : public BaseDynInst<Impl>
     bool iqItValid;
 };
 
-/*
-template<class Impl>
-template<class T>
-inline Fault
-OzoneDynInst<Impl>::read(Addr addr, T &data, unsigned flags)
-{
-    Fault fault = this->cpu->read(addr, data, flags, this);
-
-    if (this->traceData) {
-        this->traceData->setAddr(addr);
-        this->traceData->setData(data);
-    }
-
-    return fault;
-}
-
-template<class Impl>
-template<class T>
-inline Fault
-OzoneDynInst<Impl>::write(T data, Addr addr, unsigned flags, uint64_t *res)
-{
-    Fault fault = this->cpu->write(data, addr, flags, res, this);
-
-    this->storeSize = sizeof(T);
-    this->storeData = data;
-
-    if (this->traceData) {
-        this->traceData->setAddr(addr);
-        this->traceData->setData(data);
-    }
-
-    return fault;
-}
-*/
 #endif // __CPU_OZONE_DYN_INST_HH__
-- 
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