From c4793184bd32e97e8932a9a0355d8a7b8a214752 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Tue, 30 Aug 2005 13:18:54 -0400 Subject: Build options are set via a build_options file in the build directory instead of being inferred from the name of the build directory. Options are passed to C++ via config/*.hh files instead of via the command line. Build option flags are now always defined to 0 or 1, so checks must use '#if' rather than '#ifdef'. SConscript: MySQL detection moved to SConstruct. Add config/*.hh files (via ConfigFile builder). arch/alpha/alpha_memory.cc: arch/alpha/ev5.cc: arch/alpha/ev5.hh: arch/alpha/isa_traits.hh: base/fast_alloc.hh: base/statistics.cc: base/statistics.hh: base/stats/events.cc: base/stats/events.hh: cpu/base.cc: cpu/base.hh: cpu/base_dyn_inst.cc: cpu/base_dyn_inst.hh: cpu/exec_context.cc: cpu/exec_context.hh: cpu/o3/alpha_cpu.hh: cpu/o3/alpha_cpu_builder.cc: cpu/o3/alpha_cpu_impl.hh: cpu/o3/alpha_dyn_inst.hh: cpu/o3/alpha_dyn_inst_impl.hh: cpu/o3/alpha_params.hh: cpu/o3/commit_impl.hh: cpu/o3/cpu.cc: cpu/o3/cpu.hh: cpu/o3/fetch_impl.hh: cpu/o3/iew.hh: cpu/o3/iew_impl.hh: cpu/o3/regfile.hh: cpu/o3/rename_impl.hh: cpu/o3/rob_impl.hh: cpu/ozone/cpu.hh: cpu/pc_event.cc: cpu/simple/cpu.cc: cpu/simple/cpu.hh: sim/process.cc: sim/process.hh: Convert compile flags from def/undef to 0/1. Set via #include config/*.hh instead of command line. arch/alpha/isa_desc: Convert compile flags from def/undef to 0/1. Set via #include config/*.hh instead of command line. Revamp fenv.h support... most of the ugliness is hidden in base/fenv.hh now. base/mysql.hh: Fix typo in #ifndef guard. build/SConstruct: Build options are set via a build_options file in the build directory instead of being inferred from the name of the build directory. Options are passed to C++ via config/*.hh files instead of via the command line. python/SConscript: Generate m5_build_env directly from scons options instead of indirectly via CPPDEFINES. python/m5/convert.py: Allow '0' and '1' for booleans. Rewrite toBool to use dict. base/fenv.hh: Revamp support to make it a compile option (so we can test w/o it even if it's present) and to make isa_desc cleaner. --HG-- extra : convert_revision : 8f97dc11185bef5e1865b3269c7341df8525c9ad --- cpu/simple/cpu.cc | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) (limited to 'cpu/simple/cpu.cc') diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index c5e12990b..1bd5547e7 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -59,7 +59,7 @@ #include "sim/sim_object.hh" #include "sim/stats.hh" -#ifdef FULL_SYSTEM +#if FULL_SYSTEM #include "base/remote_gdb.hh" #include "mem/functional/memory_control.hh" #include "mem/functional/physical.hh" @@ -115,7 +115,7 @@ SimpleCPU::SimpleCPU(Params *p) cacheCompletionEvent(this) { _status = Idle; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM xc = new ExecContext(this, 0, p->system, p->itb, p->dtb, p->mem); // initialize CPU, including PC @@ -562,7 +562,7 @@ SimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res) } -#ifdef FULL_SYSTEM +#if FULL_SYSTEM Addr SimpleCPU::dbg_vtophys(Addr addr) { @@ -608,7 +608,7 @@ SimpleCPU::processCacheCompletion() } } -#ifdef FULL_SYSTEM +#if FULL_SYSTEM void SimpleCPU::post_interrupt(int int_num, int index) { @@ -631,7 +631,7 @@ SimpleCPU::tick() Fault fault = No_Fault; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM if (checkInterrupts && check_interrupts() && !xc->inPalMode() && status() != IcacheMissComplete) { int ipl = 0; @@ -692,7 +692,7 @@ SimpleCPU::tick() // Try to fetch an instruction // set up memory request for instruction fetch -#ifdef FULL_SYSTEM +#if FULL_SYSTEM #define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0 #else #define IFETCH_FLAGS(pc) 0 @@ -744,7 +744,7 @@ SimpleCPU::tick() traceData = Trace::getInstRecord(curTick, xc, this, curStaticInst, xc->regs.pc); -#ifdef FULL_SYSTEM +#if FULL_SYSTEM xc->setInst(inst); #endif // FULL_SYSTEM @@ -752,7 +752,7 @@ SimpleCPU::tick() fault = curStaticInst->execute(this, traceData); -#ifdef FULL_SYSTEM +#if FULL_SYSTEM if (xc->fnbin) xc->execute(curStaticInst.get()); #endif @@ -778,7 +778,7 @@ SimpleCPU::tick() } // if (fault == No_Fault) if (fault != No_Fault) { -#ifdef FULL_SYSTEM +#if FULL_SYSTEM xc->ev5_trap(fault); #else // !FULL_SYSTEM fatal("fault (%d) detected @ PC 0x%08p", fault, xc->regs.pc); @@ -790,7 +790,7 @@ SimpleCPU::tick() xc->regs.npc += sizeof(MachInst); } -#ifdef FULL_SYSTEM +#if FULL_SYSTEM Addr oldpc; do { oldpc = xc->regs.pc; @@ -818,7 +818,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(SimpleCPU) Param max_loads_any_thread; Param max_loads_all_threads; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM SimObjectParam itb; SimObjectParam dtb; SimObjectParam mem; @@ -850,7 +850,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(SimpleCPU) INIT_PARAM(max_loads_all_threads, "terminate when all threads have reached this load count"), -#ifdef FULL_SYSTEM +#if FULL_SYSTEM INIT_PARAM(itb, "Instruction TLB"), INIT_PARAM(dtb, "Data TLB"), INIT_PARAM(mem, "memory"), @@ -888,7 +888,7 @@ CREATE_SIM_OBJECT(SimpleCPU) params->dcache_interface = (dcache) ? dcache->getInterface() : NULL; params->width = width; -#ifdef FULL_SYSTEM +#if FULL_SYSTEM params->itb = itb; params->dtb = dtb; params->mem = mem; -- cgit v1.2.3