From f2ac7b645f9c352bfb2697e2893beef62af0d08a Mon Sep 17 00:00:00 2001
From: Erik Hallnor <ehallnor@umich.edu>
Date: Thu, 30 Sep 2004 01:46:48 -0400
Subject: Updates to make traces work correctly in all circumstances. Add opt
 set associative simulation.

cpu/trace/opt_cpu.cc:
cpu/trace/opt_cpu.hh:
    Add the ability to simulate less than fully-associative opt caches.
cpu/trace/reader/itx_reader.cc:
    Add writeback to the command list.

--HG--
extra : convert_revision : a9c9c4be3358f4083d7e85772620441a3ad809db
---
 cpu/trace/reader/itx_reader.cc | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'cpu/trace/reader/itx_reader.cc')

diff --git a/cpu/trace/reader/itx_reader.cc b/cpu/trace/reader/itx_reader.cc
index 56f06c870..006fcc9dd 100644
--- a/cpu/trace/reader/itx_reader.cc
+++ b/cpu/trace/reader/itx_reader.cc
@@ -161,6 +161,9 @@ ITXReader::getNextReq(MemReqPtr &req)
                   case ITXWrite:
                     tmp_req->cmd = Write;
                     break;
+                  case ITXWriteback:
+                    tmp_req->cmd = Writeback;
+                    break;
                   case ITXCode:
                     tmp_req->cmd = Read;
                     tmp_req->flags |= INST_READ;
-- 
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