From 6610699987f54ae1736b70881c2023d93b82370d Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Tue, 17 Feb 2004 22:53:15 -0500 Subject: Add COW support to the IIC. cpu/memtest/memtest.cc: Move the trace Addr to the end of the printouts --HG-- extra : convert_revision : 875f0a3f65e07f531a23fea6be07fbf3239ec2c4 --- cpu/memtest/memtest.cc | 32 +++++++++++++++++++++----------- 1 file changed, 21 insertions(+), 11 deletions(-) (limited to 'cpu') diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index 82bec8ac9..051d9623a 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -131,7 +131,8 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data) case Read: if (memcmp(req->data, data, req->size) != 0) { cerr << name() << ": on read of 0x" << hex << req->paddr - << " @ cycle " << dec << curTick + << " (0x" << hex << blockAddr(req->paddr) << ")" + << "@ cycle " << dec << curTick << ", cache returns 0x"; printData(cerr, req->data, req->size); cerr << ", expected 0x"; @@ -163,11 +164,13 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data) } if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() << ": completed " + cerr << name() << ": completed " << (req->cmd.isWrite() ? "write" : "read") << " access of " << dec << req->size << " bytes at address 0x" - << hex << req->paddr << ", value = 0x"; + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << ", value = 0x"; printData(cerr, req->data, req->size); cerr << " @ cycle " << dec << curTick; @@ -249,11 +252,13 @@ MemTest::tick() uint8_t *result = new uint8_t[8]; checkMem->access(Read, req->paddr, result, req->size); if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() + cerr << name() << ": initiating read " << ((probe)?"probe of ":"access of ") << dec << req->size << " bytes from addr 0x" - << hex << req->paddr << " at cycle " + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << " at cycle " << dec << curTick << endl; } if (probe) { @@ -269,13 +274,14 @@ MemTest::tick() memcpy(req->data, &data, req->size); checkMem->access(Write, req->paddr, req->data, req->size); if (blockAddr(req->paddr) == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " - << name() << ": initiating write " + cerr << name() << ": initiating write " << ((probe)?"probe of ":"access of ") << dec << req->size << " bytes (value = 0x"; printData(cerr, req->data, req->size); cerr << ") to addr 0x" - << hex << req->paddr << " at cycle " + << hex << req->paddr + << " (0x" << hex << blockAddr(req->paddr) << ")" + << " at cycle " << dec << curTick << endl; } if (probe) { @@ -303,11 +309,15 @@ MemTest::tick() req->data = new uint8_t[blockSize]; req->size = blockSize; if (source == traceBlockAddr || dest == traceBlockAddr) { - cerr << hex << traceBlockAddr << ": " << name() + cerr << name() << ": initiating copy of " << dec << req->size << " bytes from addr 0x" - << hex << source << " to addr 0x" - << hex << dest << " at cycle " + << hex << source + << " (0x" << hex << blockAddr(source) << ")" + << " to addr 0x" + << hex << dest + << " (0x" << hex << blockAddr(dest) << ")" + << " at cycle " << dec << curTick << endl; } cacheInterface->access(req); -- cgit v1.2.3 From 695d51e5137f43052dc54e211eb1ab239100008d Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Fri, 20 Feb 2004 15:22:41 -0500 Subject: make uncacheable stuff happen again cpu/simple_cpu/simple_cpu.cc: Allow requests to be uncacheable --HG-- extra : convert_revision : 7ab1442f2eec3763d5bc6a6f37b11f663851b12c --- cpu/simple_cpu/simple_cpu.cc | 3 --- 1 file changed, 3 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index efbe66020..d039890c7 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -343,7 +343,6 @@ SimpleCPU::read(Addr addr, T &data, unsigned flags) memReq->cmd = Read; memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -426,7 +425,6 @@ SimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) memcpy(memReq->data,(uint8_t *)&data,memReq->size); memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = dcacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is @@ -629,7 +627,6 @@ SimpleCPU::tick() memReq->completionEvent = NULL; memReq->time = curTick; - memReq->flags &= ~UNCACHEABLE; MemAccessResult result = icacheInterface->access(memReq); // Ugly hack to get an event scheduled *only* if the access is -- cgit v1.2.3 From 6a306d4cafae360c9107a845ee2d08c8667453ae Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Tue, 24 Feb 2004 14:59:25 -0500 Subject: add in an init() callback for CPU's so that no stats are accessed prior to the end of the build process. (Done by doing the registerExecContext() calling sequence in the init() process rather than the create() process). cpu/simple_cpu/simple_cpu.cc: cpu/simple_cpu/simple_cpu.hh: same thing for simple cpu's. --HG-- extra : convert_revision : aac9f91742866fb26f8cace622f9b88454a69662 --- cpu/simple_cpu/simple_cpu.cc | 23 +++++++++++++++++------ cpu/simple_cpu/simple_cpu.hh | 8 ++++++-- 2 files changed, 23 insertions(+), 8 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index d039890c7..721861dd5 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -120,7 +120,7 @@ SimpleCPU::SimpleCPU(const string &_name, FunctionalMemory *mem, MemInterface *icache_interface, MemInterface *dcache_interface, - Tick freq) + bool _def_reg, Tick freq) : BaseCPU(_name, /* number_of_threads */ 1, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads, @@ -132,12 +132,14 @@ SimpleCPU::SimpleCPU(const string &_name, Process *_process, Counter max_loads_any_thread, Counter max_loads_all_threads, MemInterface *icache_interface, - MemInterface *dcache_interface) + MemInterface *dcache_interface, + bool _def_reg) : BaseCPU(_name, /* number_of_threads */ 1, max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads), #endif - tickEvent(this), xc(NULL), cacheCompletionEvent(this) + tickEvent(this), xc(NULL), defer_registration(_def_reg), + cacheCompletionEvent(this) { _status = Idle; #ifdef FULL_SYSTEM @@ -171,6 +173,13 @@ SimpleCPU::~SimpleCPU() { } +void SimpleCPU::init() +{ + if (!defer_registration) { + this->registerExecContexts(); + } +} + void SimpleCPU::switchOut() { @@ -810,6 +819,7 @@ CREATE_SIM_OBJECT(SimpleCPU) itb, dtb, mem, (icache) ? icache->getInterface() : NULL, (dcache) ? dcache->getInterface() : NULL, + defer_registration, ticksPerSecond * mult); #else @@ -817,14 +827,15 @@ CREATE_SIM_OBJECT(SimpleCPU) max_insts_any_thread, max_insts_all_threads, max_loads_any_thread, max_loads_all_threads, (icache) ? icache->getInterface() : NULL, - (dcache) ? dcache->getInterface() : NULL); + (dcache) ? dcache->getInterface() : NULL, + defer_registration); #endif // FULL_SYSTEM - +#if 0 if (!defer_registration) { cpu->registerExecContexts(); } - +#endif return cpu; } diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 16753fa4f..4a9872e75 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -133,7 +133,7 @@ class SimpleCPU : public BaseCPU Counter max_loads_any_thread, Counter max_loads_all_threads, AlphaItb *itb, AlphaDtb *dtb, FunctionalMemory *mem, MemInterface *icache_interface, MemInterface *dcache_interface, - Tick freq); + bool _def_reg, Tick freq); #else @@ -142,11 +142,13 @@ class SimpleCPU : public BaseCPU Counter max_insts_all_threads, Counter max_loads_any_thread, Counter max_loads_all_threads, - MemInterface *icache_interface, MemInterface *dcache_interface); + MemInterface *icache_interface, MemInterface *dcache_interface, + bool _def_reg); #endif virtual ~SimpleCPU(); + virtual void init(); // execution context ExecContext *xc; @@ -166,6 +168,8 @@ class SimpleCPU : public BaseCPU // L1 data cache MemInterface *dcacheInterface; + bool defer_registration; + // current instruction MachInst inst; -- cgit v1.2.3 From 6f5e104fc5683ace0c17ddb402bf8d40330f60aa Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Thu, 26 Feb 2004 07:05:36 -0800 Subject: Make SW prefetch flag a parameter again, and add code to make it actually do something on FullCPU. Still disabled, as it causes detailed-boot to hang when you turn it on. arch/alpha/isa_desc: Add EAComp and MemAcc pseudo-instructions to prefetch StaticInst. cpu/simple_cpu/simple_cpu.hh: Changed prefetch() return type from Fault to void. --HG-- extra : convert_revision : c7cb42682bfea6af117c87d4dfdb06176b6fe6b7 --- cpu/simple_cpu/simple_cpu.hh | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4a9872e75..2b881509c 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -237,10 +237,9 @@ class SimpleCPU : public BaseCPU Fault write(T data, Addr addr, unsigned flags, uint64_t *res); - Fault prefetch(Addr addr, unsigned flags) + void prefetch(Addr addr, unsigned flags) { // need to do this... - return No_Fault; } void writeHint(Addr addr, int size) -- cgit v1.2.3 From c3784e37ceba78eee92f46ed92aa2462e238a206 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Fri, 27 Feb 2004 00:45:21 -0500 Subject: Initial copy support in the pipeline. Add copypal counting. arch/alpha/osfpal.cc: Add a string for copypal. arch/alpha/osfpal.hh: Add a code for copypal. cpu/static_inst.hh: Add an IsCopy flag. --HG-- extra : convert_revision : 19e3d90368454806029ad492eace19cd0924fe9f --- cpu/static_inst.hh | 2 ++ 1 file changed, 2 insertions(+) (limited to 'cpu') diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 5f4bcae3d..cdf9aefa0 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -96,6 +96,7 @@ class StaticInstBase : public RefCounted IsStore, ///< Writes to memory. IsInstPrefetch, ///< Instruction-cache prefetch. IsDataPrefetch, ///< Data-cache prefetch. + IsCopy, ///< Fast Cache block copy IsControl, ///< Control transfer instruction. IsDirectControl, ///< PC relative control transfer. @@ -176,6 +177,7 @@ class StaticInstBase : public RefCounted bool isStore() const { return flags[IsStore]; } bool isInstPrefetch() const { return flags[IsInstPrefetch]; } bool isDataPrefetch() const { return flags[IsDataPrefetch]; } + bool isCopy() const { return flags[IsCopy];} bool isInteger() const { return flags[IsInteger]; } bool isFloating() const { return flags[IsFloating]; } -- cgit v1.2.3 From cfb6f8fd01e19dbd0b3ce5cfa28d6f78f617e954 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Fri, 27 Feb 2004 02:40:43 -0500 Subject: Added copy instructions to the ISA. Well it didn't break anything yet... arch/alpha/isa_desc: Add copy_load and copy_store insts (ldf and stf respectively) cpu/simple_cpu/simple_cpu.hh: Add copy functions to SimpleCPU as well --HG-- extra : convert_revision : 1fa041da582b418c47d4eefc22dabba978a50e2d --- cpu/simple_cpu/simple_cpu.hh | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 2b881509c..4bdc69ad1 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -246,6 +246,17 @@ class SimpleCPU : public BaseCPU { // need to do this... } + + void copySrcTranslate(Addr src) + { + panic("Haven't implemented Copy Src translate yet in SimpleCPU\n"); + } + + void copy(Addr dest) + { + panic("Haven't implemented Copy yet in SimpleCPU\n"); + } + }; #endif // __SIMPLE_CPU_HH__ -- cgit v1.2.3 From ee967995196739b90c0b1c384d7e245d1dffdc80 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:22:32 -0500 Subject: Initial cleanup pass of lisa's function call tracking code. base/statistics.hh: We're getting rid of FS_MEASURE, but for now, we're going to still use a compile time flag to turn on and off binning of statistics. (The flag is STATS_BINNING) cpu/exec_context.cc: cpu/exec_context.hh: kern/tru64/tru64_system.cc: get rid of FS_MEASURE cpu/simple_cpu/simple_cpu.cc: yank the function call tracking code out of the cpu and move it into the software context class itself. kern/tru64/tru64_system.hh: get rid of FS_MEASURE move all of the tacking stuff to the same place. sim/system.hh: cleanup --HG-- extra : convert_revision : 73d3843afe1b3ba0d5445421c39c1148d3f4e7c0 --- cpu/exec_context.cc | 5 +---- cpu/exec_context.hh | 6 ------ cpu/simple_cpu/simple_cpu.cc | 31 ++++++------------------------- 3 files changed, 7 insertions(+), 35 deletions(-) (limited to 'cpu') diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 6a5f463cd..b0ebb9622 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -48,10 +48,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_sys, kernelStats(this, _cpu), cpu(_cpu), thread_num(_thread_num), cpu_id(-1), mem(_mem), itb(_itb), dtb(_dtb), system(_sys), memCtrl(_sys->memCtrl), physmem(_sys->physmem), -#ifdef FS_MEASURE - swCtx(NULL), -#endif - func_exe_inst(0), storeCondFailures(0) + swCtx(NULL), func_exe_inst(0), storeCondFailures(0) { memset(®s, 0, sizeof(RegFile)); } diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index e9dc5efec..a4bbdd484 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -45,10 +45,7 @@ class MemoryController; #include "kern/tru64/kernel_stats.hh" #include "sim/system.hh" - -#ifdef FS_MEASURE #include "sim/sw_context.hh" -#endif #else // !FULL_SYSTEM @@ -137,10 +134,7 @@ class ExecContext MemoryController *memCtrl; PhysicalMemory *physmem; -#ifdef FS_MEASURE SWContext *swCtx; -#endif - #else Process *process; diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 721861dd5..c25a95775 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -675,32 +675,13 @@ SimpleCPU::tick() xc->func_exe_inst++; fault = si->execute(this, xc, traceData); -#ifdef FS_MEASURE - if (!(xc->misspeculating()) && (xc->system->bin)) { - SWContext *ctx = xc->swCtx; - if (ctx && !ctx->callStack.empty()) { - if (si->isCall()) { - ctx->calls++; - } - if (si->isReturn()) { - if (ctx->calls == 0) { - fnCall *top = ctx->callStack.top(); - DPRINTF(TCPIP, "Removing %s from callstack.\n", top->name); - delete top; - ctx->callStack.pop(); - if (ctx->callStack.empty()) - xc->system->nonPath->activate(); - else - ctx->callStack.top()->myBin->activate(); - - xc->system->dumpState(xc); - } else { - ctx->calls--; - } - } - } - } + +#ifdef FULL_SYSTEM + SWContext *ctx = xc->swCtx; + if (ctx) + ctx->process(xc, si.get()); #endif + if (si->isMemRef()) { numMemRefs++; } -- cgit v1.2.3 From 47421b844299a6b5ecd6d3f4a75a516c5b00447a Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 20:32:30 -0500 Subject: fix switchover WRT interrupts cpu/base_cpu.cc: gah! copy the interrupt status on switchover --HG-- extra : convert_revision : d3199a7409a494b7687354c43ffca697f37e8456 --- cpu/base_cpu.cc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'cpu') diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 604ee335d..19dd11598 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -184,6 +184,10 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) newXC->process->replaceExecContext(newXC->cpu_id, newXC); #endif } + + for (int i = 0; i < NumInterruptLevels; ++i) + interrupts[i] = oldCPU->interrupts[i]; + intstatus = oldCPU->intstatus; } -- cgit v1.2.3 From 31ccbde8299239718ba5fc45387c30d5ccb045a7 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 29 Feb 2004 22:56:42 -0500 Subject: Fix the swichover code. It's only for FULL_SYSTEM cpu/base_cpu.cc: #ifdef FULL_SYSTEM --HG-- extra : convert_revision : 427ee93d545596da00d6c4688a7e32d584054948 --- cpu/base_cpu.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'cpu') diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index 19dd11598..367662f25 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -185,9 +185,11 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU) #endif } +#ifdef FULL_SYSTEM for (int i = 0; i < NumInterruptLevels; ++i) interrupts[i] = oldCPU->interrupts[i]; intstatus = oldCPU->intstatus; +#endif } -- cgit v1.2.3 From 7c089b2001afb93fe51b1a89456b15fd0d00c794 Mon Sep 17 00:00:00 2001 From: Erik Hallnor Date: Thu, 4 Mar 2004 14:57:57 -0500 Subject: Copy implementations arch/alpha/isa_desc: Need to return fault for copy operations. cpu/exec_context.hh: Add temporary storage to pass source address from copy load to copy store cpu/simple_cpu/simple_cpu.cc: Implement copy functions. cpu/simple_cpu/simple_cpu.hh: Return fault --HG-- extra : convert_revision : 98e5ce563449d6057ba45c70eece9235f1649a90 --- cpu/exec_context.hh | 12 ++++++++++++ cpu/simple_cpu/simple_cpu.cc | 40 ++++++++++++++++++++++++++++++++++++++++ cpu/simple_cpu/simple_cpu.hh | 11 ++--------- 3 files changed, 54 insertions(+), 9 deletions(-) (limited to 'cpu') diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index e9dc5efec..ccb01f486 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -153,6 +153,18 @@ class ExecContext #endif + /** + * Temporary storage to pass the source address from copy_load to + * copy_store. + * @todo Remove this temporary when we have a better way to do it. + */ + Addr copySrcAddr; + /** + * Temp storage for the physical source address of a copy. + * @todo Remove this temporary when we have a better way to do it. + */ + Addr copySrcPhysAddr; + /* * number of executed instructions, for matching with syscall trace diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 721861dd5..2553bd22a 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -327,6 +327,46 @@ change_thread_state(int thread_number, int activate, int priority) { } +Fault +SimpleCPU::copySrcTranslate(Addr src) +{ + memReq->reset(src, (dcacheInterface) ? + dcacheInterface->getBlockSize() + : 64); + + // translate to physical address + Fault fault = xc->translateDataReadReq(memReq); + + if (fault == No_Fault) { + xc->copySrcAddr = src; + xc->copySrcPhysAddr = memReq->paddr; + } else { + xc->copySrcAddr = 0; + xc->copySrcPhysAddr = 0; + } + return fault; +} + +Fault +SimpleCPU::copy(Addr dest) +{ + int blk_size = (dcacheInterface) ? dcacheInterface->getBlockSize() : 64; + uint8_t data[blk_size]; + assert(xc->copySrcPhysAddr); + memReq->reset(dest, blk_size); + // translate to physical address + Fault fault = xc->translateDataWriteReq(memReq); + if (fault == No_Fault) { + Addr dest_addr = memReq->paddr; + // Need to read straight from memory since we have more than 8 bytes. + memReq->paddr = xc->copySrcPhysAddr; + xc->mem->read(memReq, data); + memReq->paddr = dest_addr; + xc->mem->write(memReq, data); + } + return fault; +} + // precise architected memory state accessor macros template Fault diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4bdc69ad1..9edd66ab4 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -247,16 +247,9 @@ class SimpleCPU : public BaseCPU // need to do this... } - void copySrcTranslate(Addr src) - { - panic("Haven't implemented Copy Src translate yet in SimpleCPU\n"); - } - - void copy(Addr dest) - { - panic("Haven't implemented Copy yet in SimpleCPU\n"); - } + Fault copySrcTranslate(Addr src); + Fault copy(Addr dest); }; #endif // __SIMPLE_CPU_HH__ -- cgit v1.2.3 From 4fa703f2ec733ccb8b5ffaa741db0b8510fbe188 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 05:09:05 -0500 Subject: serialization for binning. it is WAAAAAAAY past my bedtime. cpu/exec_context.cc: sim/system.cc: sim/system.hh: serialization for binning --HG-- extra : convert_revision : f8417794a3a5ec7f2addc9c2da0f48e851899112 --- cpu/exec_context.cc | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'cpu') diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index b0ebb9622..20ab64bc4 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -104,6 +104,29 @@ ExecContext::serialize(ostream &os) regs.serialize(os); // thread_num and cpu_id are deterministic from the config SERIALIZE_SCALAR(func_exe_inst); + + bool ctx = false; + if (swCtx) { + ctx = true; + SERIALIZE_SCALAR(ctx); + SERIALIZE_SCALAR(swCtx->calls); + std::stack *stack = &(swCtx->callStack); + fnCall *top; + int size = stack->size(); + SERIALIZE_SCALAR(size); + + for (int j=0; jtop(); + paramOut(os, csprintf("stackpos[%d]",j), top->name); + } + } else { + SERIALIZE_SCALAR(ctx); + } + if (system->bin) { + Statistics::MainBin *cur = Statistics::MainBin::curBin(); + string bin_name = cur->name(); + SERIALIZE_SCALAR(bin_name); + } } @@ -114,6 +137,31 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) regs.unserialize(cp, section); // thread_num and cpu_id are deterministic from the config UNSERIALIZE_SCALAR(func_exe_inst); + + bool ctx; + UNSERIALIZE_SCALAR(ctx); + if (ctx) { + swCtx = new SWContext; + UNSERIALIZE_SCALAR(swCtx->calls); + int size; + UNSERIALIZE_SCALAR(size); + fnCall *call = new fnCall[size]; + for (int i=0; igetBin(call[i].name); + } + + for (int i=size-1; i>=0; --i) { + swCtx->callStack.push(&(call[i])); + } + + } + + if (system->bin) { + string bin_name; + UNSERIALIZE_SCALAR(bin_name); + system->getBin(bin_name)->activate(); + } } -- cgit v1.2.3 From 12662c0b6d765ccfd9ac17ff810560cea62b2e7a Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 06:14:33 -0500 Subject: nother fix cpu/exec_context.cc: nother little bug...forgot to pop off stack as i read off it sim/system.cc: forgot to pop off stack as i read off it --HG-- extra : convert_revision : d1f691c0a9f0fa22281c717ee465d8a5f1e45c13 --- cpu/exec_context.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'cpu') diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 20ab64bc4..06bd741f2 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -118,6 +118,8 @@ ExecContext::serialize(ostream &os) for (int j=0; jtop(); paramOut(os, csprintf("stackpos[%d]",j), top->name); + delete top; + stack->pop(); } } else { SERIALIZE_SCALAR(ctx); -- cgit v1.2.3 From 34576de15a3c8f8a50437e5d95b1402722cf9e2b Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 08:16:33 -0500 Subject: changes that affect post checkpoint runs. cpu/exec_context.cc: you can't delete an element of an array that you newed. oops. kern/tru64/tru64_events.cc: changes to reflect .ini changes, and also b/c es_intr and ipintr can happen at ANY point, even within a current calling path being tracked. sim/system.cc: can't delete an element of a newed array. must new them separately. --HG-- extra : convert_revision : 21573327b7b7f20bf9a3fcfb5854526433e17e17 --- cpu/exec_context.cc | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'cpu') diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 06bd741f2..776641202 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -147,14 +147,18 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(swCtx->calls); int size; UNSERIALIZE_SCALAR(size); - fnCall *call = new fnCall[size]; + + vector calls; + fnCall *call; for (int i=0; igetBin(call[i].name); + call = new fnCall; + paramIn(cp, section, csprintf("stackpos[%d]",i), call->name); + call->myBin = system->getBin(call->name); + calls.push_back(call); } for (int i=size-1; i>=0; --i) { - swCtx->callStack.push(&(call[i])); + swCtx->callStack.push(calls[i]); } } -- cgit v1.2.3 From 6eebb270be15761239565da526f84c5ec7aa45b8 Mon Sep 17 00:00:00 2001 From: Lisa Hsu Date: Fri, 5 Mar 2004 15:15:23 -0500 Subject: fix ALPHA cpu/exec_context.cc: put this code between #ifdef FULL_SYSTEM --HG-- extra : convert_revision : b934c7085d2a4337149ab8180a7d50851fbbf170 --- cpu/exec_context.cc | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'cpu') diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 776641202..eedd8b8a8 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -105,6 +105,7 @@ ExecContext::serialize(ostream &os) // thread_num and cpu_id are deterministic from the config SERIALIZE_SCALAR(func_exe_inst); +#ifdef FULL_SYSTEM bool ctx = false; if (swCtx) { ctx = true; @@ -129,6 +130,7 @@ ExecContext::serialize(ostream &os) string bin_name = cur->name(); SERIALIZE_SCALAR(bin_name); } +#endif //FULL_SYSTEM } @@ -140,6 +142,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) // thread_num and cpu_id are deterministic from the config UNSERIALIZE_SCALAR(func_exe_inst); +#ifdef FULL_SYSTEM bool ctx; UNSERIALIZE_SCALAR(ctx); if (ctx) { @@ -168,6 +171,7 @@ ExecContext::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(bin_name); system->getBin(bin_name)->activate(); } +#endif //FULL_SYSTEM } -- cgit v1.2.3