From 5a1eb9049d16d37448282362529d462d73558181 Mon Sep 17 00:00:00 2001
From: Steve Reinhardt <stever@eecs.umich.edu>
Date: Wed, 29 Oct 2003 21:45:39 -0800
Subject: Support for Serializable non-SimObject things like events. Can now
 serialize & unserialize DmaRequestEvents and DmaTransferEvents. Also support
 serialize/unserialize of pointers to SimObjects and other Serializable
 objects.

arch/alpha/alpha_memory.cc:
arch/alpha/alpha_memory.hh:
arch/alpha/isa_traits.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
dev/alpha_access.h:
dev/alpha_console.cc:
dev/alpha_console.hh:
dev/console.cc:
dev/console.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
cpu/simple_cpu/simple_cpu.cc:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Put ExecContext in its own section so its _status fields doesn't conflict.
sim/eventq.cc:
sim/eventq.hh:
    unserialize() now takes a Checkpoint* instead of an IniFile*.
    Events get serialized by the event queue only if they're marked
    as AutoSerialize... others are assumed to be serialized by something
    else (e.g. an owning SimObject) or to not matter.
sim/param.cc:
    Shift 'const' in case T is a ptr type.
sim/serialize.cc:
sim/serialize.hh:
    Define Checkpoint object to encapsulate everything you need to know
    about a checkpoint.  Use it to allow lookups of named Serializable
    objects (and SimObjects) during unserialization.
    unserialize() now takes a Checkpoint* instead of an IniFile*.

--HG--
extra : convert_revision : 8e6baab32405f8f548bb67a097b2f713296537a5
---
 cpu/exec_context.cc          | 4 ++--
 cpu/exec_context.hh          | 2 +-
 cpu/simple_cpu/simple_cpu.cc | 9 +++++----
 cpu/simple_cpu/simple_cpu.hh | 4 ++--
 4 files changed, 10 insertions(+), 9 deletions(-)

(limited to 'cpu')

diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc
index b869a8c4d..195c9daad 100644
--- a/cpu/exec_context.cc
+++ b/cpu/exec_context.cc
@@ -108,10 +108,10 @@ ExecContext::serialize(ostream &os)
 
 
 void
-ExecContext::unserialize(const IniFile *db, const std::string &section)
+ExecContext::unserialize(Checkpoint *cp, const std::string &section)
 {
     UNSERIALIZE_ENUM(_status);
-    regs.unserialize(db, section);
+    regs.unserialize(cp, section);
     // thread_num and cpu_id are deterministic from the config
     UNSERIALIZE_SCALAR(func_exe_insn);
 }
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 6938b369f..cb826a15e 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -142,7 +142,7 @@ class ExecContext
     void regStats(const std::string &name);
 
     void serialize(std::ostream &os);
-    void unserialize(const IniFile *db, const std::string &section);
+    void unserialize(Checkpoint *cp, const std::string &section);
 
 #ifdef FULL_SYSTEM
     bool validInstAddr(Addr addr) { return true; }
diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 3179b7b1f..519a8cd4d 100644
--- a/cpu/simple_cpu/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
@@ -262,6 +262,7 @@ SimpleCPU::serialize(ostream &os)
 {
     SERIALIZE_ENUM(_status);
     SERIALIZE_SCALAR(inst);
+    nameOut(os, csprintf("%s.xc", name()));
     xc->serialize(os);
     nameOut(os, csprintf("%s.tickEvent", name()));
     tickEvent.serialize(os);
@@ -270,14 +271,14 @@ SimpleCPU::serialize(ostream &os)
 }
 
 void
-SimpleCPU::unserialize(const IniFile *db, const string &section)
+SimpleCPU::unserialize(Checkpoint *cp, const string &section)
 {
     UNSERIALIZE_ENUM(_status);
     UNSERIALIZE_SCALAR(inst);
-    xc->unserialize(db, section);
-    tickEvent.unserialize(db, csprintf("%s.tickEvent", name()));
+    xc->unserialize(cp, csprintf("%s.xc", section));
+    tickEvent.unserialize(cp, csprintf("%s.tickEvent", section));
     cacheCompletionEvent
-        .unserialize(db, csprintf("%s.cacheCompletionEvent", name()));
+        .unserialize(cp, csprintf("%s.cacheCompletionEvent", section));
 }
 
 void
diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index 61831cb3c..61c9143ba 100644
--- a/cpu/simple_cpu/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
@@ -49,7 +49,7 @@ class GDBListener;
 #endif // FULL_SYSTEM
 
 class MemInterface;
-class IniFile;
+class Checkpoint;
 
 namespace Trace {
     class InstRecord;
@@ -259,7 +259,7 @@ class SimpleCPU : public BaseCPU
     void processCacheCompletion();
 
     virtual void serialize(std::ostream &os);
-    virtual void unserialize(const IniFile *db, const std::string &section);
+    virtual void unserialize(Checkpoint *cp, const std::string &section);
 
     template <class T>
     Fault read(Addr addr, T& data, unsigned flags);
-- 
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