From a4d7bb113aa4ed398a2ec7f6fb01b6d866fba60c Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 12 May 2004 15:49:01 -0400 Subject: Make a new stat type of Value which is a scalar stat that proxies for a real C/C++ scalar value or scalar functor. This replaces the scalar() and functor() terms that were previously used in formulas. This helps when dumping statistics because the formulas are not supposed to change. cpu/base_cpu.cc: Add a number of cycles stat to the cpu object that tracks the number of cycles that the cpu has executed. This starts to pave the way for cpu cycles being different from event ticks. cpu/base_cpu.hh: provide a functor for calculating all simulated instructions of all CPUs and a virtual function for determining that number. To deal with the change from functor() to Value::functor() cpu/simple_cpu/simple_cpu.cc: simTicks -> numCycles numInsts is now a real Scalar stat, not a Formula cpu/simple_cpu/simple_cpu.hh: numInsts is now a real Scalar stat, not a Formula count all instructions sim/stat_control.cc: simInsts, simTicks, hostMemory, and hostSeconds are no longer Statistics::Formula but rather Statistics::Value add new stat for tick frequency sim/stats.hh: don't need everything to be extern. test/Makefile: Make stuff work a tad bit better test/stattest.cc: test out Statistics::Value --HG-- extra : convert_revision : c812e8baa2b17c08abf3a68ed1e1125dc6f2cfb4 --- cpu/base_cpu.cc | 7 +++++++ cpu/base_cpu.hh | 20 ++++++++++++++++++-- cpu/simple_cpu/simple_cpu.cc | 5 +++-- cpu/simple_cpu/simple_cpu.hh | 7 ++++++- 4 files changed, 34 insertions(+), 5 deletions(-) (limited to 'cpu') diff --git a/cpu/base_cpu.cc b/cpu/base_cpu.cc index e00de8389..624023f0a 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base_cpu.cc @@ -130,6 +130,13 @@ BaseCPU::BaseCPU(const string &_name, int _number_of_threads, void BaseCPU::regStats() { + using namespace Statistics; + + numCycles + .name(name() + ".numCycles") + .desc("number of cpu cycles simulated") + ; + int size = execContexts.size(); if (size > 1) { for (int i = 0; i < size; ++i) { diff --git a/cpu/base_cpu.hh b/cpu/base_cpu.hh index 648035732..c4826cf15 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base_cpu.hh @@ -31,10 +31,10 @@ #include +#include "base/statistics.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" - -#include "targetarch/isa_traits.hh" // for Addr +#include "targetarch/isa_traits.hh" #ifdef FULL_SYSTEM class System; @@ -147,11 +147,27 @@ class BaseCPU : public SimObject */ virtual BranchPred *getBranchPred() { return NULL; }; + virtual Counter totalInstructions() const { return 0; } + private: static std::vector cpuList; //!< Static global cpu list public: static int numSimulatedCPUs() { return cpuList.size(); } + static Counter numSimulatedInstructions() + { + Counter total = 0; + + int size = cpuList.size(); + for (int i = 0; i < size; ++i) + total += cpuList[i]->totalInstructions(); + + return total; + } + + public: + // Number of CPU cycles simulated + Statistics::Scalar<> numCycles; }; #endif // __BASE_CPU_HH__ diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 065140883..56ea0ae11 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -287,8 +287,6 @@ SimpleCPU::regStats() ; idleFraction = constant(1.0) - notIdleFraction; - numInsts = Statistics::scalar(numInst) - Statistics::scalar(startNumInst); - simInsts += numInsts; } void @@ -590,6 +588,8 @@ SimpleCPU::post_interrupt(int int_num, int index) void SimpleCPU::tick() { + numCycles++; + traceData = NULL; Fault fault = No_Fault; @@ -697,6 +697,7 @@ SimpleCPU::tick() // keep an instruction count numInst++; + numInsts++; // check for instruction-count-based events comInstEventQueue[0]->serviceEvents(numInst); diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 4977e6992..07d6cb0c9 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -204,7 +204,12 @@ class SimpleCPU : public BaseCPU // number of simulated instructions Counter numInst; Counter startNumInst; - Statistics::Formula numInsts; + Statistics::Scalar<> numInsts; + + virtual Counter totalInstructions() const + { + return numInst - startNumInst; + } // number of simulated memory references Statistics::Scalar<> numMemRefs; -- cgit v1.2.3 From 2d8777a79bf3e3e93157ad30514996c3124324ca Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Thu, 13 May 2004 08:03:36 -0400 Subject: remove the annotation junk arch/alpha/isa_desc: remove the annotation junk Move some code to AlphaPseudo where it belongs arch/alpha/pseudo_inst.cc: arch/alpha/pseudo_inst.hh: remove the annotation junk add pseudo instruction code that was previously misplaced --HG-- extra : convert_revision : 97db8402aa34e0bdf044b138c52331fc9e714986 --- cpu/simple_cpu/simple_cpu.cc | 2 -- 1 file changed, 2 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 56ea0ae11..617c91e68 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -50,7 +50,6 @@ #include "cpu/static_inst.hh" #include "mem/base_mem.hh" #include "mem/mem_interface.hh" -#include "sim/annotation.hh" #include "sim/builder.hh" #include "sim/debug.hh" #include "sim/host.hh" @@ -579,7 +578,6 @@ SimpleCPU::post_interrupt(int int_num, int index) if (xc->status() == ExecContext::Suspended) { DPRINTF(IPI,"Suspended Processor awoke\n"); xc->activate(); - Annotate::Resume(xc); } } #endif // FULL_SYSTEM -- cgit v1.2.3 From 1d545281b96a6df358201c7b0e610bfaf9e8f213 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Mon, 17 May 2004 11:49:46 -0700 Subject: Significant changes to ISA description to completely factor out CPU model. ISA description now generates multiple output source files to (in theory) reduce compilation time. arch/alpha/isa_desc: Update for parser changes. Move most constructors out of class declarations (which are now in decoder.hh) and into decoder.cc. Move all execute() methods into exec output. arch/isa_parser.py: Significant changes to make ISA description completely independent of CPU model, and isolate model-dependent parts of parser into one little class (CpuModel). Also split up code output into multiple files (a header, a main source file, and per-cpu execute() method files). Noticeable changes to language as a result. See updated Doxygen documentation. cpu/simple_cpu/simple_cpu.hh: SimpleCPUExecContext typedef no longer needed. Add forward declaration of Process. cpu/static_inst.hh: SimpleCPUExecContext and FullCPUExecContext typedefs no longer needed. Make eaCompInst() and memAccInst() return const refs. --HG-- extra : convert_revision : 71471f267804fafd0a881bac7445677e76334daf --- cpu/simple_cpu/simple_cpu.hh | 9 ++++++--- cpu/static_inst.hh | 14 ++++++-------- 2 files changed, 12 insertions(+), 11 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index 07d6cb0c9..a04dcd057 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -34,7 +34,7 @@ #include "base/loader/symtab.hh" #include "cpu/pc_event.hh" #include "base/statistics.hh" - +#include "cpu/exec_context.hh" // forward declarations #ifdef FULL_SYSTEM @@ -46,6 +46,11 @@ class PhysicalMemory; class RemoteGDB; class GDBListener; + +#else + +class Process; + #endif // FULL_SYSTEM class MemInterface; @@ -305,6 +310,4 @@ class SimpleCPU : public BaseCPU ExecContext *xcBase() { return xc; } }; -typedef SimpleCPU SimpleCPUExecContext; - #endif // __SIMPLE_CPU_HH__ diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 57208f8e6..1065fa3d4 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -42,9 +42,7 @@ // forward declarations class ExecContext; class DynInst; -typedef DynInst FullCPUExecContext; class SimpleCPU; -typedef SimpleCPU SimpleCPUExecContext; class SymbolTable; namespace Trace { @@ -249,7 +247,8 @@ class StaticInst : public StaticInstBase * obtain the dependence info (numSrcRegs and srcRegIdx[]) for * just the EA computation. */ - virtual StaticInstPtr eaCompInst() { return nullStaticInstPtr; } + virtual const + StaticInstPtr &eaCompInst() const { return nullStaticInstPtr; } /** * Memory references only: returns "fake" instruction representing @@ -257,7 +256,8 @@ class StaticInst : public StaticInstBase * obtain the dependence info (numSrcRegs and srcRegIdx[]) for * just the memory access (not the EA computation). */ - virtual StaticInstPtr memAccInst() { return nullStaticInstPtr; } + virtual const + StaticInstPtr &memAccInst() const { return nullStaticInstPtr; } /// The binary machine instruction. const MachInst machInst; @@ -307,14 +307,12 @@ class StaticInst : public StaticInstBase /** * Execute this instruction under SimpleCPU model. */ - virtual Fault execute(SimpleCPUExecContext *xc, - Trace::InstRecord *traceData) = 0; + virtual Fault execute(SimpleCPU *xc, Trace::InstRecord *traceData) = 0; /** * Execute this instruction under detailed FullCPU model. */ - virtual Fault execute(FullCPUExecContext *xc, - Trace::InstRecord *traceData) = 0; + virtual Fault execute(DynInst *xc, Trace::InstRecord *traceData) = 0; /** * Return the target address for a PC-relative branch. -- cgit v1.2.3