From 0ff2457bfaa223c70d431d100c5b5a92540ff6e2 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 8 Dec 2003 13:15:18 -0500 Subject: move setStatus into the .cc file --HG-- extra : convert_revision : 9ccf885274d72ea3151a0db76b580dd51763edab --- cpu/simple_cpu/simple_cpu.cc | 57 ++++++++++++++++++++++++++++++++++++++++++++ cpu/simple_cpu/simple_cpu.hh | 56 +------------------------------------------ 2 files changed, 58 insertions(+), 55 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 476f28ea0..4b9a7c6bd 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -212,6 +212,63 @@ SimpleCPU::execCtxStatusChg(int thread_num) { setStatus(Idle); } +void +SimpleCPU::setStatus(Status new_status) +{ + Status old_status = status(); + + // We should never even get here if the CPU has been switched out. + assert(old_status != SwitchedOut); + + _status = new_status; + + switch (status()) { + case IcacheMissStall: + assert(old_status == Running); + lastIcacheStall = curTick; + if (tickEvent.scheduled()) + tickEvent.squash(); + break; + + case IcacheMissComplete: + assert(old_status == IcacheMissStall); + if (tickEvent.squashed()) + tickEvent.reschedule(curTick + 1); + else if (!tickEvent.scheduled()) + tickEvent.schedule(curTick + 1); + break; + + case DcacheMissStall: + assert(old_status == Running); + lastDcacheStall = curTick; + if (tickEvent.scheduled()) + tickEvent.squash(); + break; + + case Idle: + assert(old_status == Running); + idleFraction++; + if (tickEvent.scheduled()) + tickEvent.squash(); + break; + + case Running: + assert(old_status == Idle || + old_status == DcacheMissStall || + old_status == IcacheMissComplete); + if (old_status == Idle && curTick != 0) + idleFraction--; + + if (tickEvent.squashed()) + tickEvent.reschedule(curTick + 1); + else if (!tickEvent.scheduled()) + tickEvent.schedule(curTick + 1); + break; + + default: + panic("can't get here"); + } +} void SimpleCPU::regStats() diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index b0189349f..e497559ce 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -174,61 +174,7 @@ class SimpleCPU : public BaseCPU virtual void execCtxStatusChg(int thread_num); - void setStatus(Status new_status) { - Status old_status = status(); - - // We should never even get here if the CPU has been switched out. - assert(old_status != SwitchedOut); - - _status = new_status; - - switch (status()) { - case IcacheMissStall: - assert(old_status == Running); - lastIcacheStall = curTick; - if (tickEvent.scheduled()) - tickEvent.squash(); - break; - - case IcacheMissComplete: - assert(old_status == IcacheMissStall); - if (tickEvent.squashed()) - tickEvent.reschedule(curTick + 1); - else if (!tickEvent.scheduled()) - tickEvent.schedule(curTick + 1); - break; - - case DcacheMissStall: - assert(old_status == Running); - lastDcacheStall = curTick; - if (tickEvent.scheduled()) - tickEvent.squash(); - break; - - case Idle: - assert(old_status == Running); - idleFraction++; - if (tickEvent.scheduled()) - tickEvent.squash(); - break; - - case Running: - assert(old_status == Idle || - old_status == DcacheMissStall || - old_status == IcacheMissComplete); - if (old_status == Idle && curTick != 0) - idleFraction--; - - if (tickEvent.squashed()) - tickEvent.reschedule(curTick + 1); - else if (!tickEvent.scheduled()) - tickEvent.schedule(curTick + 1); - break; - - default: - panic("can't get here"); - } - } + void setStatus(Status new_status); // statistics virtual void regStats(); -- cgit v1.2.3 From 1d7c11af7d876e758e7afce47782563aefdcdcc7 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 8 Dec 2003 14:01:48 -0500 Subject: Instead of keeping track of the fraction of time that we're idle, keep track of the fraction of time we're not idle. This works better because the default processor state is idle, and the default stat value is 0. Keep the stat as idleFraction which is a formula that is equal to 1 - notIdleFraction --HG-- extra : convert_revision : 331c2e46f45ae0abda46988567ac2c4f7c42ccad --- cpu/simple_cpu/simple_cpu.cc | 8 +++++--- cpu/simple_cpu/simple_cpu.hh | 3 ++- 2 files changed, 7 insertions(+), 4 deletions(-) (limited to 'cpu') diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc index 4b9a7c6bd..aaf8a9dc5 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple_cpu/simple_cpu.cc @@ -247,7 +247,7 @@ SimpleCPU::setStatus(Status new_status) case Idle: assert(old_status == Running); - idleFraction++; + notIdleFraction--; if (tickEvent.scheduled()) tickEvent.squash(); break; @@ -256,8 +256,8 @@ SimpleCPU::setStatus(Status new_status) assert(old_status == Idle || old_status == DcacheMissStall || old_status == IcacheMissComplete); - if (old_status == Idle && curTick != 0) - idleFraction--; + if (old_status == Idle) + notIdleFraction++; if (tickEvent.squashed()) tickEvent.reschedule(curTick + 1); @@ -304,6 +304,7 @@ SimpleCPU::regStats() .prereq(dcacheStallCycles) ; + idleFraction = constant(1.0) - notIdleFraction; numInsts = Statistics::scalar(numInst) - Statistics::scalar(startNumInst); simInsts += numInsts; } @@ -312,6 +313,7 @@ void SimpleCPU::resetStats() { startNumInst = numInst; + notIdleFraction = (_status != Idle); } void diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh index e497559ce..666fe490b 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple_cpu/simple_cpu.hh @@ -193,7 +193,8 @@ class SimpleCPU : public BaseCPU Counter startNumLoad; // number of idle cycles - Statistics::Average<> idleFraction; + Statistics::Average<> notIdleFraction; + Statistics::Formula idleFraction; // number of cycles stalled for I-cache misses Statistics::Scalar<> icacheStallCycles; -- cgit v1.2.3