From d142788172ee79e6e67fc8510940c884807305ad Mon Sep 17 00:00:00 2001
From: Ron Dreslinski <rdreslin@umich.edu>
Date: Wed, 15 Feb 2006 22:05:23 -0500
Subject: More compilation fixes. Should we add a proxy_port that does the v->p
 address translation? Should the proxy port return a fault on translation
 errors, if we add one?

arch/alpha/alpha_linux_process.cc:
    Syscalls use a memPort through the CPU now instead of a xc functional memory.
cpu/base.hh:
    Add a pointer to the memPort syscalls will use.  Should this be a proxy_port that does address translation?
cpu/exec_context.cc:
cpu/exec_context.hh:
    Remove functional memory from the exec context
cpu/simple/cpu.cc:
    Set the memPort to be used as the syscall port as the dcache port
sim/syscall_emul.cc:
sim/syscall_emul.hh:
    Syscalls use a memPort through the CPU now instead of a xc functional memory.
    Also, fix the fact that readStringFunctional doesn't return a fault... should proxy_port handle this because it is doing the translation?

--HG--
extra : convert_revision : 1f65318c6594301a75dc4dc0c99fdd436b094a7f
---
 cpu/base.hh         | 9 +++++++++
 cpu/exec_context.cc | 4 ++--
 cpu/exec_context.hh | 5 +++--
 cpu/simple/cpu.cc   | 2 ++
 4 files changed, 16 insertions(+), 4 deletions(-)

(limited to 'cpu')

diff --git a/cpu/base.hh b/cpu/base.hh
index 826dcb2ec..870e26a39 100644
--- a/cpu/base.hh
+++ b/cpu/base.hh
@@ -41,6 +41,7 @@
 class System;
 class BranchPred;
 class ExecContext;
+class Port;
 
 class BaseCPU : public SimObject
 {
@@ -153,6 +154,14 @@ class BaseCPU : public SimObject
      */
     int number_of_threads;
 
+    /**
+     * A pointer to the port into the memory system to be used by syscall
+     * emulation.  This way the data being accessed via syscalls looks in
+     * the memory heirachy for any changes that haven't been written back
+     * to main memory yet.
+     */
+    Port* memPort;
+
     /**
      * Vector of per-thread instruction-based event queues.  Used for
      * scheduling events based on number of instructions committed by
diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc
index edab25d0b..a281609f4 100644
--- a/cpu/exec_context.cc
+++ b/cpu/exec_context.cc
@@ -80,7 +80,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_system,
                          Memory *_mem, Process *_process, int _asid)
     : _status(ExecContext::Unallocated),
       cpu(_cpu), thread_num(_thread_num), cpu_id(-1),
-      system(_system), mem(_mem),
+      system(_system),
       process(_process),
       asid(_asid),
       func_exe_inst(0), storeCondFailures(0)
@@ -109,7 +109,7 @@ void
 ExecContext::takeOverFrom(ExecContext *oldContext)
 {
     // some things should already be set up
-    assert(mem == oldContext->mem);
+//    assert(mem == oldContext->mem);
 #if FULL_SYSTEM
     assert(system == oldContext->system);
 #else
diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh
index 8ab3506db..c40b00e4c 100644
--- a/cpu/exec_context.hh
+++ b/cpu/exec_context.hh
@@ -122,7 +122,7 @@ class ExecContext
     int cpu_id;
 
     System *system;
-    Memory *mem;
+//    Memory *mem;
 
 #if FULL_SYSTEM
     AlphaITB *itb;
@@ -243,6 +243,7 @@ class ExecContext
 
 #endif
 
+/*
     template <class T>
     Fault read(CpuRequestPtr &req, T &data)
     {
@@ -308,7 +309,7 @@ class ExecContext
 #endif
         return mem->prot_write(req->paddr, (T)htog(data), req->size);
     }
-
+*/
     virtual bool misspeculating();
 
 
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index b6823fb63..7f589548d 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -152,6 +152,8 @@ SimpleCPU::SimpleCPU(Params *p)
     xc = new ExecContext(this, /* thread_num */ 0, p->process, /* asid */ 0);
 #endif // !FULL_SYSTEM
 
+    xc->memPort = dcachePort;
+
     req = new CpuRequest;
 
     req->asid = 0;
-- 
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