From 9ef831eeefb691eb73531471f7c04bca286f464a Mon Sep 17 00:00:00 2001
From: Kevin Lim <ktlim@umich.edu>
Date: Thu, 24 Aug 2006 17:51:35 -0400
Subject: Stats updates.

dev/ide_disk.cc:
dev/ide_disk.hh:
    Add in stats.
sim/stat_control.cc:
sim/stat_control.hh:
    Allow setup event to be called with a specific queue.

--HG--
extra : convert_revision : 9310b132b70f967a198cb2e646433f3a5332671e
---
 dev/ide_disk.cc | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

(limited to 'dev/ide_disk.cc')

diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc
index c13556ed6..701d3bf7d 100644
--- a/dev/ide_disk.cc
+++ b/dev/ide_disk.cc
@@ -406,6 +406,39 @@ IdeDisk::regStats()
         .name(name() + ".dma_write_txs")
         .desc("Number of DMA write transactions.")
         ;
+
+    rdBandwidth
+        .name(name() + ".rdBandwidth")
+        .desc("Read Bandwidth (bits/s)")
+        .precision(0)
+        .prereq(dmaReadBytes)
+        ;
+
+    wrBandwidth
+        .name(name() + ".wrBandwidth")
+        .desc("Write Bandwidth (bits/s)")
+        .precision(0)
+        .prereq(dmaWriteBytes)
+        ;
+
+    totBandwidth
+        .name(name() + ".totBandwidth")
+        .desc("Total Bandwidth (bits/s)")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    totBytes
+        .name(name() + ".totBytes")
+        .desc("Total Bytes")
+        .precision(0)
+        .prereq(totBytes)
+        ;
+
+    rdBandwidth = dmaReadBytes * Stats::constant(8) / simSeconds;
+    wrBandwidth = dmaWriteBytes * Stats::constant(8) / simSeconds;
+    totBandwidth = rdBandwidth + wrBandwidth;
+    totBytes = dmaReadBytes + dmaWriteBytes;
 }
 
 void
-- 
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