From 10c79efe556697ebbed74c82214b5505b405da5b Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Thu, 16 Feb 2006 01:22:51 -0500
Subject: Changed the fault enum into a class, and fixed everything up to work
with it. Next, the faults need to be pulled out of all the other code so that
they are only used to communicate between the CPU and the ISA.
SConscript:
The new faults.cc file in sim allocates the system wide faults. When these faults are generated through a function interface in the ISA, this file may go away.
arch/alpha/alpha_memory.cc:
Changed Fault to Fault * and took the underscores out of fault names.
arch/alpha/alpha_memory.hh:
Changed Fault to Fault *. Also, added an include for the alpha faults.
arch/alpha/ev5.cc:
Changed the fault_addr array into a fault_addr function. Once all of the faults can be expected to have the same type, fault_addr can go away completely and the info it provided will come from the fault itself. Also, Fault was changed to Fault *, and underscores were taken out of fault names.
arch/alpha/isa/decoder.isa:
Changed Fault to Fault * and took the underscores out fault names.
arch/alpha/isa/fp.isa:
Changed Fault to Fault *, and took the underscores out of fault names.
arch/alpha/isa/main.isa:
Changed Fault to Fault *, removed underscores from fault names, and made an include of the alpha faults show up in all the generated files.
arch/alpha/isa/mem.isa:
Changed Fault to Fault * and removed underscores from fault names.
arch/alpha/isa/unimp.isa:
arch/alpha/isa/unknown.isa:
cpu/exec_context.hh:
cpu/ozone/cpu.hh:
cpu/simple/cpu.cc:
dev/alpha_console.cc:
dev/ide_ctrl.cc:
dev/isa_fake.cc:
dev/pciconfigall.cc:
dev/pcidev.cc:
dev/pcidev.hh:
dev/tsunami_cchip.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Changed Fault to Fault *, and removed underscores from fault names.
arch/alpha/isa_traits.hh:
Changed the include of arch/alpha/faults.hh to sim/faults.hh, since the alpha faults weren't needed.
cpu/base_dyn_inst.cc:
Changed Fault to Fault *, and removed underscores from fault names. This file probably shouldn't use the Unimplemented Opcode fault.
cpu/base_dyn_inst.hh:
Changed Fault to Fault * and took the underscores out of the fault names.
cpu/exec_context.cc:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/fetch.hh:
dev/alpha_console.hh:
dev/baddev.hh:
dev/ide_ctrl.hh:
dev/isa_fake.hh:
dev/ns_gige.hh:
dev/pciconfigall.hh:
dev/sinic.hh:
dev/tsunami_cchip.hh:
dev/tsunami_io.hh:
dev/tsunami_pchip.hh:
dev/uart.hh:
dev/uart8250.hh:
Changed Fault to Fault *.
cpu/o3/alpha_cpu.hh:
Changed Fault to Fault *, removed underscores from fault names.
cpu/o3/alpha_cpu_impl.hh:
Changed Fault to Fault *, removed underscores from fault names, and changed the fault_addr array to the fault_addr function. Once all faults are from the ISA, this function will probably go away.
cpu/o3/commit_impl.hh:
cpu/o3/fetch_impl.hh:
dev/baddev.cc:
Changed Fault to Fault *, and removed underscores from the fault names.
cpu/o3/regfile.hh:
Added an include for the alpha specific faults which will hopefully go away once the ipr stuff is moved, changed Fault to Fault *, and removed the underscores from fault names.
cpu/simple/cpu.hh:
Changed Fault to Fault *
dev/ns_gige.cc:
Changed Fault to Fault *, and removdd underscores from fault names.
dev/sinic.cc:
Changed Fault to Fault *, and removed the underscores from fault names.
dev/uart8250.cc:
Chanted Fault to Fault *, and removed underscores from fault names.
kern/kernel_stats.cc:
Removed underscores from fault names, and from NumFaults.
kern/kernel_stats.hh:
Changed the predeclaration of Fault from an enum to a class, and changd the "fault" function to work with the classes instead of the enum. Once there are no system wide faults anymore, this code will simplify back to something like it was originally.
sim/faults.cc:
This allocates the system wide faults.
sim/faults.hh:
This declares the system wide faults.
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Removed the underscores from fault names.
--HG--
rename : arch/alpha/faults.cc => sim/faults.cc
rename : arch/alpha/faults.hh => sim/faults.hh
extra : convert_revision : 253d39258237333ae8ec4d8047367cb3ea68569d
---
dev/sinic.hh | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
(limited to 'dev/sinic.hh')
diff --git a/dev/sinic.hh b/dev/sinic.hh
index af2f109a4..7935a7cdc 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -271,15 +271,15 @@ class Device : public Base
* Memory Interface
*/
public:
- virtual Fault read(MemReqPtr &req, uint8_t *data);
- virtual Fault write(MemReqPtr &req, const uint8_t *data);
+ virtual Fault * read(MemReqPtr &req, uint8_t *data);
+ virtual Fault * write(MemReqPtr &req, const uint8_t *data);
void prepareIO(int cpu, int index);
void prepareRead(int cpu, int index);
void prepareWrite(int cpu, int index);
- Fault iprRead(Addr daddr, int cpu, uint64_t &result);
- Fault readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
- Fault writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
+ Fault * iprRead(Addr daddr, int cpu, uint64_t &result);
+ Fault * readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
+ Fault * writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
void regWrite(Addr daddr, int cpu, const uint8_t *data);
Tick cacheAccess(MemReqPtr &req);
--
cgit v1.2.3
From 3a0102536bdbf00629e6ba944bd55ee0ec77fb52 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <binkertn@umich.edu>
Date: Mon, 20 Feb 2006 23:41:50 -0500
Subject: Get rid of the code that delays PIO write accesses until the cache
access occurs. The fundamental problem is that a subsequent read that occurs
functionally will get a functionally incorrect result that can break driver
code.
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/sinic.cc:
dev/sinic.hh:
get rid of pio_delay write and the associated code to move
the write to the cache access function
dev/sinicreg.hh:
no more write delays
python/m5/objects/Ethernet.py:
get rid of pio_delay write
--HG--
extra : convert_revision : 1dcb51b8f4514e717bc334a782dfdf06d29ae69d
---
dev/sinic.hh | 12 ------------
1 file changed, 12 deletions(-)
(limited to 'dev/sinic.hh')
diff --git a/dev/sinic.hh b/dev/sinic.hh
index 7935a7cdc..06751a955 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -283,17 +283,6 @@ class Device : public Base
void regWrite(Addr daddr, int cpu, const uint8_t *data);
Tick cacheAccess(MemReqPtr &req);
- protected:
- struct RegWriteData {
- Addr daddr;
- uint64_t value;
- RegWriteData(Addr da, uint64_t val) : daddr(da), value(val) {}
- };
-
- std::vector<std::list<RegWriteData> > writeQueue;
-
- bool pioDelayWrite;
-
/**
* Statistics
*/
@@ -349,7 +338,6 @@ class Device : public Base
Bus *header_bus;
Bus *payload_bus;
Tick pio_latency;
- bool pio_delay_write;
PhysicalMemory *physmem;
IntrControl *intctrl;
bool rx_filter;
--
cgit v1.2.3
From 8d80fd1477fa39ebc5bad4ca5c727b2871fd9b8d Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Tue, 21 Feb 2006 20:10:40 -0500
Subject: Changed Fault * to Fault, which is a typedef to FaultBase *, which is
the old Fault class renamed.
--HG--
extra : convert_revision : 5b2f457401f8ff94fe39fe071288eb117814b7bb
---
dev/sinic.hh | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
(limited to 'dev/sinic.hh')
diff --git a/dev/sinic.hh b/dev/sinic.hh
index 06751a955..97ebf4c30 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -271,15 +271,15 @@ class Device : public Base
* Memory Interface
*/
public:
- virtual Fault * read(MemReqPtr &req, uint8_t *data);
- virtual Fault * write(MemReqPtr &req, const uint8_t *data);
+ virtual Fault read(MemReqPtr &req, uint8_t *data);
+ virtual Fault write(MemReqPtr &req, const uint8_t *data);
void prepareIO(int cpu, int index);
void prepareRead(int cpu, int index);
void prepareWrite(int cpu, int index);
- Fault * iprRead(Addr daddr, int cpu, uint64_t &result);
- Fault * readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
- Fault * writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
+ Fault iprRead(Addr daddr, int cpu, uint64_t &result);
+ Fault readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
+ Fault writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
void regWrite(Addr daddr, int cpu, const uint8_t *data);
Tick cacheAccess(MemReqPtr &req);
--
cgit v1.2.3
From 25b39da69d4267b34a87b7324008b6d4480a2b09 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <binkertn@umich.edu>
Date: Sat, 25 Feb 2006 22:01:05 -0500
Subject: Since the delayed write stuff is gone, get rid of regWrite and merge
it with writeBar0
--HG--
extra : convert_revision : 354642e0d528b6a5a7f2cdf0264d93e738b2d4eb
---
dev/sinic.hh | 1 -
1 file changed, 1 deletion(-)
(limited to 'dev/sinic.hh')
diff --git a/dev/sinic.hh b/dev/sinic.hh
index 97ebf4c30..c4027be86 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -280,7 +280,6 @@ class Device : public Base
Fault iprRead(Addr daddr, int cpu, uint64_t &result);
Fault readBar0(MemReqPtr &req, Addr daddr, uint8_t *data);
Fault writeBar0(MemReqPtr &req, Addr daddr, const uint8_t *data);
- void regWrite(Addr daddr, int cpu, const uint8_t *data);
Tick cacheAccess(MemReqPtr &req);
/**
--
cgit v1.2.3
From 7546fabe68a1dc6ec9b9e020f5e2b1cc0aa31c21 Mon Sep 17 00:00:00 2001
From: Nathan Binkert <binkertn@umich.edu>
Date: Fri, 3 Mar 2006 14:17:48 -0500
Subject: Ethernet devices have an RSS option to tell the driver to use Receive
side scaling
dev/ns_gige.cc:
dev/ns_gige.hh:
dev/ns_gige_reg.h:
dev/sinic.cc:
dev/sinic.hh:
dev/sinicreg.hh:
add support for setting the RSS flag to notify the driver
to use RSS
--HG--
extra : convert_revision : 5f0c11668ae976634b3bf0caad669a9464a4c041
---
dev/sinic.hh | 1 +
1 file changed, 1 insertion(+)
(limited to 'dev/sinic.hh')
diff --git a/dev/sinic.hh b/dev/sinic.hh
index c4027be86..25172fa45 100644
--- a/dev/sinic.hh
+++ b/dev/sinic.hh
@@ -355,6 +355,7 @@ class Device : public Base
bool dma_no_allocate;
bool rx_thread;
bool tx_thread;
+ bool rss;
};
protected:
--
cgit v1.2.3