From 0e805e1ff35a5c70f8aff785db709c1f3b8d0c28 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Wed, 21 Jan 2004 20:14:10 -0500 Subject: one step closer to booting dev/alpha_access.h: removed my attempted hack to get console compling in linux dev/tsunami.cc: dev/tsunami.hh: added pchip pointer to tsunami dev/tsunami_cchip.cc: made printing better dev/tsunami_cchip.hh: commented out back pointer for now, since the parser has issues with it dev/tsunamireg.h: added pchip registers --HG-- extra : convert_revision : b4fceb7d08e757d9aaf37df8eb1bcd5ae29ce0da --- dev/tsunami_cchip.cc | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) (limited to 'dev/tsunami_cchip.cc') diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc index 364d0fac2..ca9eae184 100644 --- a/dev/tsunami_cchip.cc +++ b/dev/tsunami_cchip.cc @@ -23,9 +23,9 @@ using namespace std; -TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, +TsunamiCChip::TsunamiCChip(const string &name, /*Tsunami *t,*/ Addr addr, Addr mask, MemoryController *mmu) - : MmapDevice(name, addr, mask, mmu), tsunami(t) + : MmapDevice(name, addr, mask, mmu)/*, tsunami(t) */ { for(int i=0; i < Tsunami::Max_CPUs; i++) { dim[i] = 0; @@ -38,7 +38,7 @@ TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t, Fault TsunamiCChip::read(MemReqPtr req, uint8_t *data) { - DPRINTF(Tsunami, "cchip read va=%#x size=%d\n", + DPRINTF(Tsunami, "read va=%#x size=%d\n", req->vaddr, req->size); Addr daddr = (req->paddr & addr_mask) >> 6; @@ -106,6 +106,8 @@ TsunamiCChip::read(MemReqPtr req, uint8_t *data) case TSDEV_CC_MPR3: panic("TSDEV_CC_MPRx not implemented\n"); return No_Fault; + default: + panic("default in cchip read reached, accessing 0x%x\n"); } // uint64_t break; @@ -113,7 +115,7 @@ TsunamiCChip::read(MemReqPtr req, uint8_t *data) case sizeof(uint16_t): case sizeof(uint8_t): default: - panic("invalid access size(?) for tsunami register!"); + panic("invalid access size(?) for tsunami register!\n"); } DPRINTFN("Tsunami CChip ERROR: read daddr=%#x size=%d\n", daddr, req->size); @@ -123,7 +125,7 @@ TsunamiCChip::read(MemReqPtr req, uint8_t *data) Fault TsunamiCChip::write(MemReqPtr req, const uint8_t *data) { - DPRINTF(Tsunami, "Tsunami CChip write - va=%#x size=%d \n", + DPRINTF(Tsunami, "write - va=%#x size=%d \n", req->vaddr, req->size); Addr daddr = (req->paddr & addr_mask) >> 6; @@ -183,6 +185,8 @@ TsunamiCChip::write(MemReqPtr req, const uint8_t *data) case TSDEV_CC_MPR3: panic("TSDEV_CC_MPRx write not implemented\n"); return No_Fault; + default: + panic("default in cchip read reached, accessing 0x%x\n"); } break; @@ -190,7 +194,7 @@ TsunamiCChip::write(MemReqPtr req, const uint8_t *data) case sizeof(uint16_t): case sizeof(uint8_t): default: - panic("invalid access size(?) for tsunami register!"); + panic("invalid access size(?) for tsunami register!\n"); } DPRINTFN("Tsunami ERROR: write daddr=%#x size=%d\n", daddr, req->size); @@ -212,7 +216,7 @@ TsunamiCChip::unserialize(Checkpoint *cp, const std::string §ion) BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip) - SimObjectParam tsunami; + // SimObjectParam tsunami; SimObjectParam mmu; Param addr; Param mask; @@ -221,7 +225,7 @@ END_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip) BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiCChip) - INIT_PARAM(tsunami, "Tsunami"), +// INIT_PARAM(tsunami, "Tsunami"), INIT_PARAM(mmu, "Memory Controller"), INIT_PARAM(addr, "Device Address"), INIT_PARAM(mask, "Address Mask") @@ -230,7 +234,7 @@ END_INIT_SIM_OBJECT_PARAMS(TsunamiCChip) CREATE_SIM_OBJECT(TsunamiCChip) { - return new TsunamiCChip(getInstanceName(), tsunami, addr, mask, mmu); + return new TsunamiCChip(getInstanceName(), /*tsunami,*/ addr, mask, mmu); } REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip) -- cgit v1.2.3