From 444f520f7e2da9468fa622dcf51859915bd31fd6 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 27 Feb 2006 03:57:15 -0500
Subject: MachineCheckFaults and AlignmentFaults are now generated by the ISA,
 rather than being created directly.

arch/alpha/alpha_memory.cc:
cpu/base_dyn_inst.cc:
dev/alpha_console.cc:
dev/pcidev.hh:
dev/sinic.cc:
    MachineCheckFaults are now generated by the ISA, rather than being created directly.

--HG--
extra : convert_revision : 34a7da41639e93be21ed70dac681b27480008d19
---
 dev/alpha_console.cc | 4 ++--
 dev/pcidev.hh        | 6 ++++--
 dev/sinic.cc         | 8 ++++----
 3 files changed, 10 insertions(+), 8 deletions(-)

(limited to 'dev')

diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index 85134b435..c8327736f 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -182,7 +182,7 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data)
             }
             break;
         default:
-            return new MachineCheckFault;
+            return genMachineCheckFault();
     }
 
     return NoFault;
@@ -202,7 +202,7 @@ AlphaConsole::write(MemReqPtr &req, const uint8_t *data)
         val = *(uint64_t *)data;
         break;
       default:
-        return new MachineCheckFault;
+        return genMachineCheckFault();
     }
 
     Addr daddr = req->paddr - (addr & EV5::PAddrImplMask);
diff --git a/dev/pcidev.hh b/dev/pcidev.hh
index 4f08c2cf9..bdfc6b932 100644
--- a/dev/pcidev.hh
+++ b/dev/pcidev.hh
@@ -260,6 +260,7 @@ class PciDev : public DmaDevice
 inline Fault
 PciDev::readBar(MemReqPtr &req, uint8_t *data)
 {
+    using namespace TheISA;
     if (isBAR(req->paddr, 0))
         return readBar0(req, req->paddr - BARAddrs[0], data);
     if (isBAR(req->paddr, 1))
@@ -272,12 +273,13 @@ PciDev::readBar(MemReqPtr &req, uint8_t *data)
         return readBar4(req, req->paddr - BARAddrs[4], data);
     if (isBAR(req->paddr, 5))
         return readBar5(req, req->paddr - BARAddrs[5], data);
-    return new MachineCheckFault;
+    return genMachineCheckFault();
 }
 
 inline Fault
 PciDev::writeBar(MemReqPtr &req, const uint8_t *data)
 {
+    using namespace TheISA;
     if (isBAR(req->paddr, 0))
         return writeBar0(req, req->paddr - BARAddrs[0], data);
     if (isBAR(req->paddr, 1))
@@ -290,7 +292,7 @@ PciDev::writeBar(MemReqPtr &req, const uint8_t *data)
         return writeBar4(req, req->paddr - BARAddrs[4], data);
     if (isBAR(req->paddr, 5))
         return writeBar5(req, req->paddr - BARAddrs[5], data);
-    return new MachineCheckFault;
+    return genMachineCheckFault();
 }
 
 #endif // __DEV_PCIDEV_HH__
diff --git a/dev/sinic.cc b/dev/sinic.cc
index 3f7226817..ba643de4b 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -363,11 +363,11 @@ Device::read(MemReqPtr &req, uint8_t *data)
     assert(config.command & PCI_CMD_MSE);
     Fault fault = readBar(req, data);
 
-    if (fault->isA<MachineCheckFault>()) {
+    if (fault->isMachineCheckFault()) {
         panic("address does not map to a BAR pa=%#x va=%#x size=%d",
               req->paddr, req->vaddr, req->size);
 
-        return new MachineCheckFault;
+        return genMachineCheckFault();
     }
 
     return fault;
@@ -459,11 +459,11 @@ Device::write(MemReqPtr &req, const uint8_t *data)
     assert(config.command & PCI_CMD_MSE);
     Fault fault = writeBar(req, data);
 
-    if (fault->isA<MachineCheckFault>()) {
+    if (fault->isMachineCheckFault()) {
         panic("address does not map to a BAR pa=%#x va=%#x size=%d",
               req->paddr, req->vaddr, req->size);
 
-        return new MachineCheckFault;
+        return genMachineCheckFault();
     }
 
     return fault;
-- 
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