From c4029ecb306e95a188edf0b8d20a87f1e03e32fe Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 27 Jun 2005 17:02:40 -0400 Subject: Implement a state machine clock that acutally limits how fast the nsgige state machine can run. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.cc: Implement a state machine clock that acutally limits how fast the state machine can run. After each state transition, a variable is kept to hold the next state transition until the next clock. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.hh: Add back the rxKickEvent and txKickEvent events. python/m5/objects/Ethernet.py: Default the state machine clock to '0ns' so the default behaviour doesn't change when we actually implement the state machine clock. --HG-- extra : convert_revision : 2db1943dee4e91ea75aaee6a91e88f27f01a09dd --- dev/ns_gige.cc | 70 ++++++++++++++++++++++++++++++++++++++++------------------ dev/ns_gige.hh | 2 ++ 2 files changed, 51 insertions(+), 21 deletions(-) (limited to 'dev') diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc index 108f2616c..4e7deba90 100644 --- a/dev/ns_gige.cc +++ b/dev/ns_gige.cc @@ -102,7 +102,7 @@ NSGigE::NSGigE(Params *p) txDmaReadEvent(this), txDmaWriteEvent(this), dmaDescFree(p->dma_desc_free), dmaDataFree(p->dma_data_free), txDelay(p->tx_delay), rxDelay(p->rx_delay), - rxKickTick(0), txKickTick(0), + rxKickTick(0), rxKickEvent(this), txKickTick(0), txKickEvent(this), txEvent(this), rxFilterEnable(p->rx_filter), acceptBroadcast(false), acceptMulticast(false), acceptUnicast(false), acceptPerfect(false), acceptArp(false), @@ -841,7 +841,8 @@ NSGigE::write(MemReqPtr &req, const uint8_t *data) panic("writing to read-only or reserved CFGR bits!\n"); regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS | - CFGR_RESERVED | CFGR_T64ADDR | CFGR_PCI64_DET); + CFGR_RESERVED | CFGR_T64ADDR | + CFGR_PCI64_DET); // all these #if 0's are because i don't THINK the kernel needs to // have these implemented. if there is a problem relating to one of @@ -1487,13 +1488,19 @@ NSGigE::rxKick() DPRINTF(EthernetSM, "receive kick rxState=%s (rxBuf.size=%d)\n", NsRxStateStrings[rxState], rxFifo.size()); - if (rxKickTick > curTick) { - DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n", - rxKickTick); - return; + next: + if (clock) { + if (rxKickTick > curTick) { + DPRINTF(EthernetSM, "receive kick exiting, can't run till %d\n", + rxKickTick); + + goto exit; + } + + // Go to the next state machine clock tick. + rxKickTick = curTick + cycles(1); } - next: switch(rxDmaState) { case dmaReadWaiting: if (doRxDmaRead()) @@ -1561,8 +1568,7 @@ NSGigE::rxKick() if (rxDmaState != dmaIdle) goto exit; - DPRINTF(EthernetDesc, - "rxDescCache: addr=%08x read descriptor\n", + DPRINTF(EthernetDesc, "rxDescCache: addr=%08x read descriptor\n", regs.rxdp & 0x3fffffff); DPRINTF(EthernetDesc, "rxDescCache: link=%08x bufptr=%08x cmdsts=%08x extsts=%08x\n", @@ -1783,7 +1789,6 @@ NSGigE::rxKick() DPRINTF(EthernetSM, "entering next rxState=%s\n", NsRxStateStrings[rxState]); - goto next; exit: @@ -1792,6 +1797,9 @@ NSGigE::rxKick() */ DPRINTF(EthernetSM, "rx state machine exited rxState=%s\n", NsRxStateStrings[rxState]); + + if (clock && !rxKickEvent.scheduled()) + rxKickEvent.schedule(rxKickTick); } void @@ -1954,13 +1962,18 @@ NSGigE::txKick() DPRINTF(EthernetSM, "transmit kick txState=%s\n", NsTxStateStrings[txState]); - if (txKickTick > curTick) { - DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n", - txKickTick); - return; + next: + if (clock) { + if (txKickTick > curTick) { + DPRINTF(EthernetSM, "transmit kick exiting, can't run till %d\n", + txKickTick); + goto exit; + } + + // Go to the next state machine clock tick. + txKickTick = curTick + cycles(1); } - next: switch(txDmaState) { case dmaReadWaiting: if (doTxDmaRead()) @@ -2022,6 +2035,8 @@ NSGigE::txKick() if (txDmaState != dmaIdle) goto exit; + DPRINTF(EthernetDesc, "txDescCache: addr=%08x read descriptor\n", + regs.txdp & 0x3fffffff); DPRINTF(EthernetDesc, "txDescCache: link=%08x bufptr=%08x cmdsts=%08x extsts=%08x\n", txDescCache.link, txDescCache.bufptr, txDescCache.cmdsts, @@ -2186,7 +2201,12 @@ NSGigE::txKick() if (txDescCache.cmdsts & CMDSTS_INTR) devIntrPost(ISR_TXDESC); - txState = txAdvance; + if (!txEnable) { + DPRINTF(EthernetSM, "halting TX state machine\n"); + txState = txIdle; + goto exit; + } else + txState = txAdvance; break; case txAdvance: @@ -2215,7 +2235,6 @@ NSGigE::txKick() DPRINTF(EthernetSM, "entering next txState=%s\n", NsTxStateStrings[txState]); - goto next; exit: @@ -2224,6 +2243,9 @@ NSGigE::txKick() */ DPRINTF(EthernetSM, "tx state machine exited txState=%s\n", NsTxStateStrings[txState]); + + if (clock && !txKickEvent.scheduled()) + txKickEvent.schedule(txKickTick); } void @@ -2429,6 +2451,7 @@ NSGigE::serialize(ostream &os) SERIALIZE_SCALAR(rxDescCache.bufptr); SERIALIZE_SCALAR(rxDescCache.cmdsts); SERIALIZE_SCALAR(rxDescCache.extsts); + SERIALIZE_SCALAR(extstsEnable); /* * Serialize tx state machine @@ -2441,6 +2464,7 @@ NSGigE::serialize(ostream &os) SERIALIZE_SCALAR(txDescCnt); int txDmaState = this->txDmaState; SERIALIZE_SCALAR(txDmaState); + SERIALIZE_SCALAR(txKickTick); /* * Serialize rx state machine @@ -2454,8 +2478,7 @@ NSGigE::serialize(ostream &os) SERIALIZE_SCALAR(rxDescCnt); int rxDmaState = this->rxDmaState; SERIALIZE_SCALAR(rxDmaState); - - SERIALIZE_SCALAR(extstsEnable); + SERIALIZE_SCALAR(rxKickTick); /* * If there's a pending transmit, store the time so we can @@ -2575,6 +2598,7 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion) UNSERIALIZE_SCALAR(rxDescCache.bufptr); UNSERIALIZE_SCALAR(rxDescCache.cmdsts); UNSERIALIZE_SCALAR(rxDescCache.extsts); + UNSERIALIZE_SCALAR(extstsEnable); /* * unserialize tx state machine @@ -2589,6 +2613,9 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion) int txDmaState; UNSERIALIZE_SCALAR(txDmaState); this->txDmaState = (DmaState) txDmaState; + UNSERIALIZE_SCALAR(txKickTick); + if (txKickTick) + txKickEvent.schedule(txKickTick); /* * unserialize rx state machine @@ -2604,8 +2631,9 @@ NSGigE::unserialize(Checkpoint *cp, const std::string §ion) int rxDmaState; UNSERIALIZE_SCALAR(rxDmaState); this->rxDmaState = (DmaState) rxDmaState; - - UNSERIALIZE_SCALAR(extstsEnable); + UNSERIALIZE_SCALAR(rxKickTick); + if (rxKickTick) + rxKickEvent.schedule(rxKickTick); /* * If there's a pending transmit, reschedule it now diff --git a/dev/ns_gige.hh b/dev/ns_gige.hh index f39731493..143460b64 100644 --- a/dev/ns_gige.hh +++ b/dev/ns_gige.hh @@ -266,11 +266,13 @@ class NSGigE : public PciDev Tick rxKickTick; typedef EventWrapper RxKickEvent; friend void RxKickEvent::process(); + RxKickEvent rxKickEvent; void txKick(); Tick txKickTick; typedef EventWrapper TxKickEvent; friend void TxKickEvent::process(); + TxKickEvent txKickEvent; /** * Retransmit event -- cgit v1.2.3 From 10a906be528df1e7495a68f415833a27e8279840 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 27 Jun 2005 17:04:43 -0400 Subject: Update for console code reorganization dev/alpha_access.h: Update the ALPHA_ACCESS_VERSION move typedefs to this file since they're only used here. dev/alpha_console.cc: formatting sim/system.cc: xxm -> m5 --HG-- extra : convert_revision : 3aeca50d1385034f5a1e20dd8b0abd03bd6f26f0 --- dev/alpha_access.h | 5 ++++- dev/alpha_console.cc | 6 ++++-- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'dev') diff --git a/dev/alpha_access.h b/dev/alpha_access.h index c0a571ced..07350d622 100644 --- a/dev/alpha_access.h +++ b/dev/alpha_access.h @@ -33,12 +33,15 @@ * System Console Memory Mapped Register Definition */ -#define ALPHA_ACCESS_VERSION (1301) +#define ALPHA_ACCESS_VERSION (1302) #ifndef CONSOLE #include #include class Checkpoint; +#else +typedef unsigned uint32_t; +typedef unsigned long uint64_t; #endif // This structure hacked up from simos diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 3ae1aede5..2cbe60f47 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -108,7 +108,8 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data) switch (req->size) { case sizeof(uint32_t): - DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *(uint32_t*)data); + DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, + *(uint32_t*)data); switch (daddr) { case offsetof(AlphaAccess, last_offset): @@ -133,7 +134,8 @@ AlphaConsole::read(MemReqPtr &req, uint8_t *data) } break; case sizeof(uint64_t): - DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, *(uint64_t*)data); + DPRINTF(AlphaConsole, "read: offset=%#x val=%#x\n", daddr, + *(uint64_t*)data); switch (daddr) { case offsetof(AlphaAccess, inputChar): -- cgit v1.2.3 From d172447a7ae945139d0c3465b8504cd6b77ae819 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 28 Jun 2005 01:09:13 -0400 Subject: Pass the location of the m5 console backdoor to the console instead of compiling it into the console version dev/alpha_access.h: move serialization stuff to alpha_console.hh define the ALPHA_ACCESS_BASE in m5 instead of in console.c and have m5 pass the value to the console dev/alpha_console.cc: dev/alpha_console.hh: Move serialization stuff into a derived class of AlphaAccess sim/system.cc: pass the value of ALPHA_ACCESS_BASE to the console code via the m5AlphaAccess console variable. --HG-- extra : convert_revision : 0ea4ba239f03d6dad51a6efae0385aa543064117 --- dev/alpha_access.h | 19 ++++++++----------- dev/alpha_console.cc | 6 +++--- dev/alpha_console.hh | 8 +++++++- 3 files changed, 18 insertions(+), 15 deletions(-) (limited to 'dev') diff --git a/dev/alpha_access.h b/dev/alpha_access.h index 07350d622..b62966ea0 100644 --- a/dev/alpha_access.h +++ b/dev/alpha_access.h @@ -33,15 +33,17 @@ * System Console Memory Mapped Register Definition */ -#define ALPHA_ACCESS_VERSION (1302) +#define ALPHA_ACCESS_VERSION (1303) -#ifndef CONSOLE -#include -#include -class Checkpoint; -#else +#ifdef CONSOLE typedef unsigned uint32_t; typedef unsigned long uint64_t; +#else +#ifdef ALPHA_TLASER +#define ALPHA_ACCESS_BASE ULL(0xfffffc8000a00000) +#else +#define ALPHA_ACCESS_BASE ULL(0xfffffd0200000000) +#endif #endif // This structure hacked up from simos @@ -74,11 +76,6 @@ struct AlphaAccess uint64_t bootStrapImpure; // 70: uint32_t bootStrapCPU; // 78: uint32_t align2; // 7C: Dummy placeholder for alignment - -#ifndef CONSOLE - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); -#endif }; #endif // __ALPHA_ACCESS_H__ diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 2cbe60f47..3c009d4bd 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -69,7 +69,7 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, pioInterface->addAddrRange(RangeSize(addr, size)); } - alphaAccess = new AlphaAccess; + alphaAccess = new Access; alphaAccess->last_offset = size - 1; alphaAccess->version = ALPHA_ACCESS_VERSION; @@ -268,7 +268,7 @@ AlphaConsole::cacheAccess(MemReqPtr &req) } void -AlphaAccess::serialize(ostream &os) +AlphaConsole::Access::serialize(ostream &os) { SERIALIZE_SCALAR(last_offset); SERIALIZE_SCALAR(version); @@ -291,7 +291,7 @@ AlphaAccess::serialize(ostream &os) } void -AlphaAccess::unserialize(Checkpoint *cp, const std::string §ion) +AlphaConsole::Access::unserialize(Checkpoint *cp, const std::string §ion) { UNSERIALIZE_SCALAR(last_offset); UNSERIALIZE_SCALAR(version); diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index 63e0d3ae4..eb59626f5 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -72,8 +72,14 @@ class SimpleDisk; class AlphaConsole : public PioDevice { protected: + struct Access : public AlphaAccess + { + void serialize(std::ostream &os); + void unserialize(Checkpoint *cp, const std::string §ion); + }; + union { - AlphaAccess *alphaAccess; + Access *alphaAccess; uint8_t *consoleData; }; -- cgit v1.2.3 From 036a8ceb8da8aff10b819b4aab32584d41282a64 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Tue, 28 Jun 2005 12:42:15 -0400 Subject: Don't hard code the location of m5AlphaAccess. Instead, move the code into a function that can be called by the AlphaConsole class. AlphaConsole will pass in its address. arch/alpha/ev5.hh: Move Phys2K0Seg to ev5.hh and fixup the TSUNAMI uncacheable bits so that they will be converted correctly. dev/alpha_access.h: Do not hard code the location of the AlphaConsole dev/alpha_console.cc: fixup #includes tell the system where the alpha console is sim/system.hh: Provide a function that will tell the system where the AlphaAccess structure (device) lives --HG-- extra : convert_revision : 92d70ca926151a32eebe9925de597459ac58013e --- dev/alpha_access.h | 6 ------ dev/alpha_console.cc | 9 +++++---- 2 files changed, 5 insertions(+), 10 deletions(-) (limited to 'dev') diff --git a/dev/alpha_access.h b/dev/alpha_access.h index b62966ea0..a20a05535 100644 --- a/dev/alpha_access.h +++ b/dev/alpha_access.h @@ -38,12 +38,6 @@ #ifdef CONSOLE typedef unsigned uint32_t; typedef unsigned long uint64_t; -#else -#ifdef ALPHA_TLASER -#define ALPHA_ACCESS_BASE ULL(0xfffffc8000a00000) -#else -#define ALPHA_ACCESS_BASE ULL(0xfffffd0200000000) -#endif #endif // This structure hacked up from simos diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 3c009d4bd..34c2978aa 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -35,23 +35,22 @@ #include #include "base/inifile.hh" -#include "base/str.hh" // for to_number() +#include "base/str.hh" #include "base/trace.hh" #include "cpu/base.hh" #include "cpu/exec_context.hh" #include "dev/alpha_console.hh" #include "dev/simconsole.hh" #include "dev/simple_disk.hh" +#include "dev/tsunami_io.hh" #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" #include "mem/functional/memory_control.hh" #include "mem/functional/physical.hh" #include "sim/builder.hh" -#include "sim/system.hh" -#include "dev/tsunami_io.hh" #include "sim/sim_object.hh" -#include "targetarch/byte_swap.hh" +#include "sim/system.hh" using namespace std; @@ -85,6 +84,8 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, alphaAccess->bootStrapImpure = 0; alphaAccess->bootStrapCPU = 0; alphaAccess->align2 = 0; + + system->setAlphaAccess(addr); } void -- cgit v1.2.3 From 8a0bc840221cf7af4845f4ee44de11bc7271ff10 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 29 Jun 2005 01:20:41 -0400 Subject: Allow CPUs to specify their own CPU ids. Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788 --- dev/alpha_console.cc | 11 ++++------- dev/alpha_console.hh | 4 ++-- 2 files changed, 6 insertions(+), 9 deletions(-) (limited to 'dev') diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 34c2978aa..c4799bf6b 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -56,7 +56,7 @@ using namespace std; AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, System *s, BaseCPU *c, Platform *p, - int num_cpus, MemoryController *mmu, Addr a, + MemoryController *mmu, Addr a, HierParams *hier, Bus *bus) : PioDevice(name, p), disk(d), console(cons), system(s), cpu(c), addr(a) { @@ -72,7 +72,6 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, alphaAccess->last_offset = size - 1; alphaAccess->version = ALPHA_ACCESS_VERSION; - alphaAccess->numCPUs = num_cpus; alphaAccess->diskUnit = 1; alphaAccess->diskCount = 0; @@ -89,8 +88,9 @@ AlphaConsole::AlphaConsole(const string &name, SimConsole *cons, SimpleDisk *d, } void -AlphaConsole::init() +AlphaConsole::startup() { + alphaAccess->numCPUs = system->getNumCPUs(); alphaAccess->kernStart = system->getKernelStart(); alphaAccess->kernEnd = system->getKernelEnd(); alphaAccess->entryPoint = system->getKernelEntry(); @@ -330,7 +330,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole) SimObjectParam sim_console; SimObjectParam disk; - Param num_cpus; SimObjectParam mmu; Param addr; SimObjectParam system; @@ -346,7 +345,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AlphaConsole) INIT_PARAM(sim_console, "The Simulator Console"), INIT_PARAM(disk, "Simple Disk"), - INIT_PARAM_DFLT(num_cpus, "Number of CPU's", 1), INIT_PARAM(mmu, "Memory Controller"), INIT_PARAM(addr, "Device Address"), INIT_PARAM(system, "system object"), @@ -361,8 +359,7 @@ END_INIT_SIM_OBJECT_PARAMS(AlphaConsole) CREATE_SIM_OBJECT(AlphaConsole) { return new AlphaConsole(getInstanceName(), sim_console, disk, - system, cpu, platform, num_cpus, mmu, - addr, hier, io_bus); + system, cpu, platform, mmu, addr, hier, io_bus); } REGISTER_SIM_OBJECT("AlphaConsole", AlphaConsole) diff --git a/dev/alpha_console.hh b/dev/alpha_console.hh index eb59626f5..6236c5713 100644 --- a/dev/alpha_console.hh +++ b/dev/alpha_console.hh @@ -102,10 +102,10 @@ class AlphaConsole : public PioDevice /** Standard Constructor */ AlphaConsole(const std::string &name, SimConsole *cons, SimpleDisk *d, System *s, BaseCPU *c, Platform *platform, - int num_cpus, MemoryController *mmu, Addr addr, + MemoryController *mmu, Addr addr, HierParams *hier, Bus *bus); - virtual void init(); + virtual void startup(); /** * memory mapped reads and writes -- cgit v1.2.3 From 451e41c6e957cdcb97e0a041e0d7a97ed99f1ecc Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 29 Jun 2005 22:16:40 -0400 Subject: Fix uninitialized variables in ide controller dev/ide_ctrl.cc: Initialize variables to zero to avoid uninitialized usage. --HG-- extra : convert_revision : 98fd0bfc2b7530938c6ab3a55345d0e594098238 --- dev/ide_ctrl.cc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'dev') diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc index 0037e06e0..785f18ae8 100644 --- a/dev/ide_ctrl.cc +++ b/dev/ide_ctrl.cc @@ -103,6 +103,8 @@ IdeController::IdeController(Params *p) // setup the disks attached to controller memset(disks, 0, sizeof(IdeDisk *) * 4); + dev[0] = 0; + dev[1] = 0; if (params()->disks.size() > 3) panic("IDE controllers support a maximum of 4 devices attached!\n"); -- cgit v1.2.3 From 5107b3bc83b5e5f4acbb7113843f942b14346ac2 Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Thu, 30 Jun 2005 00:42:27 -0400 Subject: Fixes for cygwin compile. dev/ide_atareg.h: Need endian.h for LITTLE_ENDIAN. sim/syscall_emul.hh: Need to include sys/fcntl.h to get O_BINARY. --HG-- extra : convert_revision : 606f9506dc483f3952dcc65b8ba25c28001f2c43 --- dev/ide_atareg.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'dev') diff --git a/dev/ide_atareg.h b/dev/ide_atareg.h index a3a2bd604..5320529c8 100644 --- a/dev/ide_atareg.h +++ b/dev/ide_atareg.h @@ -33,7 +33,14 @@ #ifndef _DEV_ATA_ATAREG_H_ #define _DEV_ATA_ATAREG_H_ +#if defined(linux) +#include +#else +#include +#endif + #define ATA_BYTE_ORDER LITTLE_ENDIAN + /* * Drive parameter structure for ATA/ATAPI. * Bit fields: WDC_* : common to ATA/ATAPI -- cgit v1.2.3