From e76bfc87640dd236f1527e3f8f19507f0275dad9 Mon Sep 17 00:00:00 2001 From: Alec Roelke Date: Wed, 30 Nov 2016 17:10:28 -0500 Subject: arch: [Patch 1/5] Added RISC-V base instruction set RV64I First of five patches adding RISC-V to GEM5. This patch introduces the base 64-bit ISA (RV64I) in src/arch/riscv for use with syscall emulation. The multiply, floating point, and atomic memory instructions will be added in additional patches, as well as support for more detailed CPU models. The loader is also modified to be able to parse RISC-V ELF files, and a "Hello world\!" example for RISC-V is added to test-progs. Patch 2 will implement the multiply extension, RV64M; patch 3 will implement the floating point (single- and double-precision) extensions, RV64FD; patch 4 will implement the atomic memory instructions, RV64A, and patch 5 will add support for timing, minor, and detailed CPU models that is missing from the first four patches (such as handling locked memory). [Removed several unused parameters and imports from RiscvInterrupts.py, RiscvISA.py, and RiscvSystem.py.] [Fixed copyright information in RISC-V files copied from elsewhere that had ARM licenses attached.] [Reorganized instruction definitions in decoder.isa so that they are sorted by opcode in preparation for the addition of ISA extensions M, A, F, D.] [Fixed formatting of several files, removed some variables and instructions that were missed when moving them to other patches, fixed RISC-V Foundation copyright attribution, and fixed history of files copied from other architectures using hg copy.] [Fixed indentation of switch cases in isa.cc.] [Reorganized syscall descriptions in linux/process.cc to remove large number of repeated unimplemented system calls and added implmementations to functions that have received them since it process.cc was first created.] [Fixed spacing for some copyright attributions.] [Replaced the rest of the file copies using hg copy.] [Fixed style check errors and corrected unaligned memory accesses.] [Fix some minor formatting mistakes.] Signed-off by: Alec Roelke Signed-off by: Jason Lowe-Power --- ext/libelf/elf_common.h | 1 + 1 file changed, 1 insertion(+) (limited to 'ext/libelf') diff --git a/ext/libelf/elf_common.h b/ext/libelf/elf_common.h index bad988d87..52d1d1496 100644 --- a/ext/libelf/elf_common.h +++ b/ext/libelf/elf_common.h @@ -173,6 +173,7 @@ typedef struct { #define EM_X86_64 62 /* Advanced Micro Devices x86-64 */ #define EM_AMD64 EM_X86_64 /* Advanced Micro Devices x86-64 (compat) */ #define EM_AARCH64 183 /* AArch64 64 bit ARM. */ +#define EM_RISCV 243 /* Berkeley RISC-V */ /* Non-standard or deprecated. */ #define EM_486 6 /* Intel i486. */ -- cgit v1.2.3