From c2740578404b4e46d198de70af1cfd554033d99f Mon Sep 17 00:00:00 2001
From: Andreas Sandberg <andreas.sandberg@arm.com>
Date: Tue, 7 Jul 2015 10:03:13 +0100
Subject: ext: Add the NoMali GPU no-simulation library

Add revision 9adf9d6e2d889a483a92136c96eb8a434d360561 of NoMali-model
from https://github.com/ARM-software/nomali-model. This library
implements the register interface of the Mali T6xx/T7xx series GPUs,
but doesn't do any rendering. It can be used to hide the effects of
software rendering.
---
 ext/nomali/lib/mmu.cc | 64 +++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 ext/nomali/lib/mmu.cc

(limited to 'ext/nomali/lib/mmu.cc')

diff --git a/ext/nomali/lib/mmu.cc b/ext/nomali/lib/mmu.cc
new file mode 100644
index 000000000..2d166b5af
--- /dev/null
+++ b/ext/nomali/lib/mmu.cc
@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2014-2015 ARM Limited
+ * All rights reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+#include "mmu.hh"
+
+#include "gpu.hh"
+#include "regutils.hh"
+
+namespace NoMali {
+
+MMU::MMU(GPU &_gpu)
+    : GPUBlockInt(_gpu,
+                  RegAddr(MMU_IRQ_RAWSTAT),
+                  RegAddr(MMU_IRQ_CLEAR),
+                  RegAddr(MMU_IRQ_MASK),
+                  RegAddr(MMU_IRQ_STATUS)),
+      regs(BLOCK_NUM_REGS)
+{
+}
+
+MMU::~MMU()
+{
+}
+
+void
+MMU::writeReg(RegAddr addr, uint32_t value)
+{
+    switch (addr.value) {
+      case MMU_IRQ_RAWSTAT:
+      case MMU_IRQ_CLEAR:
+      case MMU_IRQ_MASK:
+      case MMU_IRQ_STATUS:
+        GPUBlockInt::writeReg(addr, value);
+        break;
+
+      default:
+        // Ignore writes by default
+        break;
+    };
+}
+
+void
+MMU::onInterrupt(int set)
+{
+    gpu.intMMU(set);
+}
+
+}
-- 
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