From f6fc18f03d639098b1421fa3412329773b0a6ab1 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Tue, 11 Apr 2006 13:42:47 -0400 Subject: fullsys now builds and runs for about one cycle SConscript: easier to fix than temporarily remove cpu/simple/cpu.cc: cpu/simple/cpu.hh: mem needed for both fullsys and syscall dev/baddev.cc: fix for new mem system dev/io_device.cc: fix typo dev/io_device.hh: PioDevice needs to be a memobject dev/isa_fake.cc: dev/pciconfigall.cc: dev/pciconfigall.hh: fix for new mem systems dev/platform.cc: dev/platform.hh: dev/tsunami.cc: dev/tsunami.hh: rather than the platform have a pointer to pciconfig, go the other way so all devices are the same and can have a platform pointer dev/tsunami_cchip.cc: dev/tsunami_io.cc: dev/tsunami_io.hh: dev/tsunami_pchip.cc: dev/tsunami_pchip.hh: dev/uart8250.cc: python/m5/objects/AlphaConsole.py: python/m5/objects/BadDevice.py: python/m5/objects/BaseCPU.py: python/m5/objects/Device.py: python/m5/objects/Pci.py: python/m5/objects/PhysicalMemory.py: python/m5/objects/System.py: python/m5/objects/Tsunami.py: python/m5/objects/Uart.py: fixes for newmem --HG-- extra : convert_revision : b7b67e19095cca64889f6307725aa2f3d84c7105 --- python/m5/objects/Uart.py | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'python/m5/objects/Uart.py') diff --git a/python/m5/objects/Uart.py b/python/m5/objects/Uart.py index 6eda5cdb3..54754aeb9 100644 --- a/python/m5/objects/Uart.py +++ b/python/m5/objects/Uart.py @@ -1,11 +1,10 @@ from m5 import * -from Device import PioDevice +from Device import BasicPioDevice -class Uart(PioDevice): +class Uart(BasicPioDevice): type = 'Uart' abstract = True - console = Param.SimConsole(Parent.any, "The console") - size = Param.Addr(0x8, "Device size") + sim_console = Param.SimConsole(Parent.any, "The console") class Uart8250(Uart): type = 'Uart8250' -- cgit v1.2.3