From 535cfaa01e0234e224e588e753419d8777e22d0b Mon Sep 17 00:00:00 2001 From: Steve Reinhardt Date: Sun, 17 Apr 2005 00:41:50 -0400 Subject: Mostly hacks for multiplying Frequency-type proxies by constants (plus some small fixes). python/m5/config.py: Hacks to allow multiplication on Frequency/Latency-valued proxies. Provide __rmul__ as well as __mul__ on Proxy objects. test/genini.py: Default value for -EFOO should be True not 1 (since 1 is no longer convertable to Bool). --HG-- extra : convert_revision : f8a221fcd9e095fdd7b7db4be0ed0cdcd20074be --- python/m5/config.py | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'python/m5') diff --git a/python/m5/config.py b/python/m5/config.py index 74988109b..2db2164fc 100644 --- a/python/m5/config.py +++ b/python/m5/config.py @@ -177,7 +177,7 @@ class Proxy(object): # support multiplying proxies by constants def __mul__(self, other): - if not isinstance(other, int): + if not isinstance(other, (int, float)): raise TypeError, "Proxy multiplier must be integer" if self._multiplier == None: self._multiplier = other @@ -186,13 +186,19 @@ class Proxy(object): self._multiplier *= other return self + __rmul__ = __mul__ + def _mulcheck(self, result): if self._multiplier == None: return result if not isinstance(result, int): - raise TypeError, "Proxy with multiplier resolves to " \ - "non-integer value" - return result * self._multiplier + # this was an error, but for now we'll assume if it's not + # an int it must be a Frequency (yuk) + result = Frequency._convert(result) + # assuming we're dealing with a frequency here, turn it into + # a string and give it a 't' suffix so the Frequency._convert + # doesn't choke on it later. + return ("%d" % int(round((result * self._multiplier)))) + 't' def unproxy(self, base, ptype): obj = base -- cgit v1.2.3 From 3154e2a0c75d6e95458d86b30c982efc003c1f68 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Sun, 24 Apr 2005 21:32:32 -0400 Subject: Add the m5 parameter to the ns83820 device model so that we can pass simulator specific options to the device driver. dev/ns_gige.cc: Add the m5 register and parameter to the ns83820 device model so that we can pass simulator specific options to the device driver. dev/ns_gige.hh: dev/ns_gige_reg.h: Add the m5 register to the ns83820 device model --HG-- extra : convert_revision : 84674887560fa3b607e725b8e5bc8272761fcf09 --- python/m5/objects/Ethernet.mpy | 2 ++ 1 file changed, 2 insertions(+) (limited to 'python/m5') diff --git a/python/m5/objects/Ethernet.mpy b/python/m5/objects/Ethernet.mpy index ed95ce233..7cc58421a 100644 --- a/python/m5/objects/Ethernet.mpy +++ b/python/m5/objects/Ethernet.mpy @@ -72,6 +72,8 @@ simobj NSGigE(PciDevice): rx_fifo_size = Param.MemorySize('128kB', "max size in bytes of rxFifo") tx_fifo_size = Param.MemorySize('128kB', "max size in bytes of txFifo") + m5reg = Param.UInt32(0, "Register for m5 usage") + intr_delay = Param.Latency('0us', "Interrupt Delay in microseconds") payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload") physmem = Param.PhysicalMemory(parent.any, "Physical Memory") -- cgit v1.2.3 From 602a489573c96d574798c622a70b1b466330fdaf Mon Sep 17 00:00:00 2001 From: Ron Dreslinski Date: Fri, 29 Apr 2005 21:01:43 -0400 Subject: Add suport for no allocation of cache block on a dma read passing through a cache from the cpu-side interface --HG-- extra : convert_revision : 0a3b3741924ed39c1c8710d0963e4c8f3e73f81a --- python/m5/objects/Ethernet.mpy | 3 +++ 1 file changed, 3 insertions(+) (limited to 'python/m5') diff --git a/python/m5/objects/Ethernet.mpy b/python/m5/objects/Ethernet.mpy index 7cc58421a..141d138da 100644 --- a/python/m5/objects/Ethernet.mpy +++ b/python/m5/objects/Ethernet.mpy @@ -41,6 +41,7 @@ simobj EtherDev(DmaDevice): dma_read_factor = Param.Latency('0us', "multiplier for dma reads") dma_write_delay = Param.Latency('0us', "fixed delay for dma writes") dma_write_factor = Param.Latency('0us', "multiplier for dma writes") + dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") rx_filter = Param.Bool(True, "Enable Receive Filter") rx_delay = Param.Latency('1us', "Receive Delay") @@ -64,6 +65,8 @@ simobj NSGigE(PciDevice): dma_read_factor = Param.Latency('0us', "multiplier for dma reads") dma_write_delay = Param.Latency('0us', "fixed delay for dma writes") dma_write_factor = Param.Latency('0us', "multiplier for dma writes") + dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") + rx_filter = Param.Bool(True, "Enable Receive Filter") rx_delay = Param.Latency('1us', "Receive Delay") -- cgit v1.2.3