From 6e0ad62fdc8c0518e54366e3bca25e75335f3198 Mon Sep 17 00:00:00 2001
From: Benjamin Nash <benash@umich.edu>
Date: Tue, 26 Jul 2005 12:28:33 -0400
Subject: Various changes to I/O, addition of PciFake device to improve FreeBSD
compatibility.
SConscript:
Include pcifake.cc, fix spacing.
dev/ide_ctrl.cc:
Consolidate switch-case blocks.
dev/ide_disk.cc:
Add comments.
dev/pciconfigall.cc:
Adjust spacing.
dev/pcidev.cc:
Adjust spacing, rearrange code.
dev/tsunami_io.cc:
Rearrange code.
dev/uart8250.cc:
Switch uart interrupt interval back to original value.
python/m5/objects/Pci.py:
Add PciFake class to be used as a PCI-ISA bridge device.
--HG--
extra : convert_revision : 8aea94318510079a310377f297aa161ba5f7864c
---
python/m5/objects/Pci.py | 3 +++
1 file changed, 3 insertions(+)
(limited to 'python/m5')
diff --git a/python/m5/objects/Pci.py b/python/m5/objects/Pci.py
index 0957e2883..defdd10a3 100644
--- a/python/m5/objects/Pci.py
+++ b/python/m5/objects/Pci.py
@@ -50,3 +50,6 @@ class PciDevice(DmaDevice):
pci_func = Param.Int("PCI function code")
configdata = Param.PciConfigData(Parent.any, "PCI Config data")
configspace = Param.PciConfigAll(Parent.any, "PCI Configspace")
+
+class PciFake(PciDevice):
+ type = 'PciFake'
--
cgit v1.2.3