From 5ea3c1c8f3902a0c291637e068c13a983229261f Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 27 Jun 2005 17:01:24 -0400 Subject: rename m5scons.py scons_helper.py --HG-- extra : convert_revision : faaacc493b8da5d002d498e10cfa8cf004aafeed --- python/SConscript | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'python') diff --git a/python/SConscript b/python/SConscript index 1082b52c1..57b018fea 100644 --- a/python/SConscript +++ b/python/SConscript @@ -30,7 +30,7 @@ import os, os.path, re, sys Import('env') -import m5scons +import scons_helper def WriteEmbeddedPyFile(target, source, path, name, ext, filename): if isinstance(source, str): @@ -151,7 +151,7 @@ def MakeDefinesPyFile(target, source, env): f = file(str(target[0]), 'w') print >>f, "import __main__" print >>f, "__main__.m5_build_env = ", - print >>f, m5scons.flatten_defines(env['CPPDEFINES']) + print >>f, scons_helper.flatten_defines(env['CPPDEFINES']) f.close() CFileCounter = 0 -- cgit v1.2.3 From c4029ecb306e95a188edf0b8d20a87f1e03e32fe Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Mon, 27 Jun 2005 17:02:40 -0400 Subject: Implement a state machine clock that acutally limits how fast the nsgige state machine can run. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.cc: Implement a state machine clock that acutally limits how fast the state machine can run. After each state transition, a variable is kept to hold the next state transition until the next clock. The frequency is of the actual state transitions, and not the rate of what underlying instructions might run at. dev/ns_gige.hh: Add back the rxKickEvent and txKickEvent events. python/m5/objects/Ethernet.py: Default the state machine clock to '0ns' so the default behaviour doesn't change when we actually implement the state machine clock. --HG-- extra : convert_revision : 2db1943dee4e91ea75aaee6a91e88f27f01a09dd --- python/m5/objects/Ethernet.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'python') diff --git a/python/m5/objects/Ethernet.py b/python/m5/objects/Ethernet.py index 2fbfb1138..a357ba346 100644 --- a/python/m5/objects/Ethernet.py +++ b/python/m5/objects/Ethernet.py @@ -64,7 +64,7 @@ class NSGigE(PciDevice): hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") - clock = Param.Clock('100MHz', "State machine processor frequency") + clock = Param.Clock('0ns', "State machine processor frequency") dma_data_free = Param.Bool(False, "DMA of Data is free") dma_desc_free = Param.Bool(False, "DMA of Descriptors is free") -- cgit v1.2.3 From 8a0bc840221cf7af4845f4ee44de11bc7271ff10 Mon Sep 17 00:00:00 2001 From: Nathan Binkert Date: Wed, 29 Jun 2005 01:20:41 -0400 Subject: Allow CPUs to specify their own CPU ids. Make the AlphaConsole calculate the number of CPUs instead of passing that in as a parameter. cpu/base.cc: pass the desired cpu_id into registerExecContext, offsetting it by the thread number. a cpu_id of -1 means that it should be generated for you. cpu/base.hh: Take the cpu_id as a parameter cpu/o3/alpha_cpu_builder.cc: cpu/simple/cpu.cc: Accept the cpu_id as a parameter while we're here, let's remove the multiplier since it is not used. dev/alpha_console.cc: don't take the number of CPUs as a parameter. Calculate it from the system based on the number of CPUs that have been registered. move init() code to startup() to ensure that all CPUs are registerd. dev/alpha_console.hh: python/m5/objects/AlphaConsole.py: don't take the number of CPUs as a parameter. move init() code to startup() to ensure that all CPUs are registerd. python/m5/objects/BaseCPU.py: take the cpu_id as a parameter. Default it to -1 which means that it will be generated. sim/system.cc: allow the registerExecContext functioin to take a desired cpu_id as a parameter. Check to ensure that the id isn't already used. Accept -1 as a request to have an id assigned. sim/system.hh: keep track of the number of registered exec contexts. provide a function for accessing the number of exec contexts that checks to ensure that they are all registered correctly. --HG-- extra : convert_revision : 8e12f96ff8a49fa16cdbbdb4c05c651376c35788 --- python/m5/objects/AlphaConsole.py | 1 - python/m5/objects/BaseCPU.py | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) (limited to 'python') diff --git a/python/m5/objects/AlphaConsole.py b/python/m5/objects/AlphaConsole.py index 32a137bec..f8f034682 100644 --- a/python/m5/objects/AlphaConsole.py +++ b/python/m5/objects/AlphaConsole.py @@ -5,6 +5,5 @@ class AlphaConsole(PioDevice): type = 'AlphaConsole' cpu = Param.BaseCPU(Parent.any, "Processor") disk = Param.SimpleDisk("Simple Disk") - num_cpus = Param.Int(1, "Number of CPUs") sim_console = Param.SimConsole(Parent.any, "The Simulator Console") system = Param.System(Parent.any, "system object") diff --git a/python/m5/objects/BaseCPU.py b/python/m5/objects/BaseCPU.py index 452b97c84..a90203729 100644 --- a/python/m5/objects/BaseCPU.py +++ b/python/m5/objects/BaseCPU.py @@ -10,6 +10,7 @@ class BaseCPU(SimObject): itb = Param.AlphaITB("Instruction TLB") mem = Param.FunctionalMemory("memory") system = Param.System(Parent.any, "system object") + cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") -- cgit v1.2.3