From e196d20d9d047a869e1d853fd02077b1d909a576 Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 30 Mar 2006 15:59:49 -0500
Subject: Make TranslatingPort be a type of Port rather than something special

arch/alpha/arguments.cc:
    rather than returning 0, put a panic in... it will actually make us fix
    this rather than scratching our respective heads
base/loader/object_file.cc:
base/loader/object_file.hh:
    Object loader now takes a port rather than a translating port
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
sim/process.cc:
    Make translating port a type of port rather than anything special
cpu/simple/cpu.cc:
    no need to grab a port from the cpu anymore
mem/physical.cc:
    add an additional type of port to physicalmemory called "functional"
    Only used for functional accesses (loading binaries/syscall emu)
mem/port.hh:
    make readBlok/writeBlob virtual so translating port can do the
    translation first
mem/translating_port.cc:
mem/translating_port.hh:
    Make TranslatingPort inherit from Port
sim/system.cc:
    header file that doesn't exit removed

--HG--
extra : convert_revision : 89b08f6146bba61f5605678d736055feab2fe6f7
---
 sim/process.cc | 20 +++++---------------
 sim/system.cc  |  1 -
 2 files changed, 5 insertions(+), 16 deletions(-)

(limited to 'sim')

diff --git a/sim/process.cc b/sim/process.cc
index 7b27c4274..b483c70dc 100644
--- a/sim/process.cc
+++ b/sim/process.cc
@@ -153,21 +153,11 @@ Process::startup()
     // mark this context as active so it will start ticking.
     xc->activate(0);
 
-    // Here we are grabbing the memory port of the CPU hosting the
-    // initial execution context for initialization.  In the long run
-    // this is not what we want, since it means that all
-    // initialization accesses (e.g., loading object file sections)
-    // will be done a cache block at a time through the CPU's cache.
-    // We really want something more like:
-    //
-    // memport = system->physmem->getPort();
-    // myPort.setPeer(memport);
-    // memport->setPeer(&myPort);
-    // initVirtMem = new TranslatingPort(myPort, pTable);
-    //
-    // but we need our own dummy port "myPort" that doesn't exist.
-    // In the short term it works just fine though.
-    initVirtMem = xc->getMemPort();
+    Port *mem_port;
+    mem_port = system->physmem->getPort("functional");
+    initVirtMem = new TranslatingPort(pTable, true);
+    mem_port->setPeer(initVirtMem);
+    initVirtMem->setPeer(mem_port);
 }
 
 void
diff --git a/sim/system.cc b/sim/system.cc
index 409e41ead..c1eaaf916 100644
--- a/sim/system.cc
+++ b/sim/system.cc
@@ -10,7 +10,6 @@
 #if FULL_SYSTEM
 #include "base/remote_gdb.hh"
 #include "kern/kernel_stats.hh"
-#include "mem/functional/memory_control.hh"
 #include "arch/vtophys.hh"
 #endif
 
-- 
cgit v1.2.3


From 5936c79ba0f3fd29ef2bbf41fcaddc78fcd9c75c Mon Sep 17 00:00:00 2001
From: Ali Saidi <saidi@eecs.umich.edu>
Date: Thu, 30 Mar 2006 18:06:00 -0500
Subject: Add a functional port that is used to load the original binaries in
 FS SE mode now has a port that goes to whatever toplevel mem object the CPU
 sees that does the appropriate translation for syscall emulation

SConscript:
    translating port is a syscall emu only source
arch/alpha/system.cc:
base/loader/object_file.cc:
base/loader/object_file.hh:
    Use the new functional port to write the binaries into memory
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/simple/cpu.cc:
    We aren't always going to be writing straight to memory with syscalls
    support writing to a cache
mem/port.hh:
    Add a simple unidirectional functional port that panics on any incoming requests
mem/translating_port.hh:
    make translating port inherit from the simple port
sim/system.cc:
sim/system.hh:
    Add a functional port that is used to load the original binaries

--HG--
extra : convert_revision : 9096866d0b23e3aceea68394abb76e63c0f8fd8d
---
 sim/system.cc | 12 +++++++++++-
 sim/system.hh |  5 +++++
 2 files changed, 16 insertions(+), 1 deletion(-)

(limited to 'sim')

diff --git a/sim/system.cc b/sim/system.cc
index c1eaaf916..cfa316b11 100644
--- a/sim/system.cc
+++ b/sim/system.cc
@@ -36,6 +36,16 @@ System::System(Params *p)
     kernelSymtab = new SymbolTable;
     debugSymbolTable = new SymbolTable;
 
+
+    /**
+     * Get a functional port to memory
+     */
+    Port *mem_port;
+    mem_port = physmem->getPort("functional");
+    functionalPort.setPeer(mem_port);
+    mem_port->setPeer(&functionalPort);
+
+
     /**
      * Load the kernel code into memory
      */
@@ -45,7 +55,7 @@ System::System(Params *p)
         fatal("Could not load kernel file %s", params()->kernel_path);
 
     // Load program sections into memory
-    kernel->loadSections(physmem, true);
+    kernel->loadSections(&functionalPort, LoadAddrMask);
 
     // setup entry points
     kernelStart = kernel->textBase();
diff --git a/sim/system.hh b/sim/system.hh
index 0f82f81f5..11f8ac70a 100644
--- a/sim/system.hh
+++ b/sim/system.hh
@@ -36,6 +36,7 @@
 #include "base/misc.hh"
 #include "base/statistics.hh"
 #include "cpu/pc_event.hh"
+#include "mem/port.hh"
 #include "sim/sim_object.hh"
 #if FULL_SYSTEM
 #include "kern/system_events.hh"
@@ -76,6 +77,10 @@ class System : public SimObject
     Platform *platform;
     uint64_t init_param;
 
+    /** Port to physical memory used for writing object files into ram at
+     * boot.*/
+    FunctionalPort functionalPort;
+
     /** kernel symbol table */
     SymbolTable *kernelSymtab;
 
-- 
cgit v1.2.3