From 608641e23c7f2288810c3f23a1a63790b664f2ab Mon Sep 17 00:00:00 2001
From: Nilay Vaish <nilay@cs.wisc.edu>
Date: Sun, 26 Jul 2015 10:21:20 -0500
Subject: cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.
---
 src/arch/SConscript | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

(limited to 'src/arch/SConscript')

diff --git a/src/arch/SConscript b/src/arch/SConscript
index e0d6845f5..89ecdfa73 100644
--- a/src/arch/SConscript
+++ b/src/arch/SConscript
@@ -196,5 +196,7 @@ env.Append(BUILDERS = {'ScanISA' :
 DebugFlag('IntRegs')
 DebugFlag('FloatRegs')
 DebugFlag('CCRegs')
+DebugFlag('VectorRegs')
 DebugFlag('MiscRegs')
-CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
+CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'VectorRegs',
+                            'MiscRegs' ])
-- 
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