From 32daf6fc3fd34af0023ae74c2a1f8dd597f87242 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 8 Jul 2009 23:02:20 -0700 Subject: Registers: Add an ISA object which replaces the MiscRegFile. This object encapsulates (or will eventually) the identity and characteristics of the ISA in the CPU. --- src/arch/alpha/isa/main.isa | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/arch/alpha/isa') diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa index aea44976c..d2b37590a 100644 --- a/src/arch/alpha/isa/main.isa +++ b/src/arch/alpha/isa/main.isa @@ -55,6 +55,7 @@ output header {{ output decoder {{ #include +#include "arch/alpha/miscregfile.hh" #include "base/cprintf.hh" #include "base/fenv.hh" #include "base/loader/symtab.hh" @@ -71,6 +72,7 @@ output exec {{ #include "base/cp_annotate.hh" #include "sim/pseudo_inst.hh" #include "arch/alpha/ipr.hh" +#include "arch/alpha/miscregfile.hh" #include "base/fenv.hh" #include "config/ss_compatible_fp.hh" #include "cpu/base.hh" -- cgit v1.2.3