From e1168e72ca8ae370a1989220a202347980c6a4d2 Mon Sep 17 00:00:00 2001
From: Min Kyu Jeong <minkyu.jeong@arm.com>
Date: Wed, 25 Aug 2010 19:10:43 -0500
Subject: ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)

When decoding a srs instruction, invalid mode encoding returns invalid instruction.
This can happen when garbage instructions are fetched from mispredicted path
---
 src/arch/alpha/registers.hh | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/arch/alpha/registers.hh')

diff --git a/src/arch/alpha/registers.hh b/src/arch/alpha/registers.hh
index ec36ff751..d8752d520 100644
--- a/src/arch/alpha/registers.hh
+++ b/src/arch/alpha/registers.hh
@@ -101,7 +101,8 @@ enum DependenceTags {
     // 0..31 are the integer regs 0..31
     // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Base_DepTag)
     FP_Base_DepTag = 40,
-    Ctrl_Base_DepTag = 72
+    Ctrl_Base_DepTag = 72,
+    Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs + NumInternalProcRegs
 };
 
 } // namespace AlphaISA
-- 
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