From 5ef0b7a9db3c6ec4ca191c2e9381719e1e694873 Mon Sep 17 00:00:00 2001
From: Korey Sewell <ksewell@umich.edu>
Date: Sun, 19 Jun 2011 21:43:41 -0400
Subject: inorder/dtb: make sure DTB translate correct address The DTB expects
 the correct PC in the ThreadContext but how if the memory accesses are
 speculative? Shouldn't we send along the requestor's PC to the translate
 functions?

---
 src/arch/alpha/tlb.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/arch/alpha/tlb.cc')

diff --git a/src/arch/alpha/tlb.cc b/src/arch/alpha/tlb.cc
index 2c7e6732a..fbe188973 100644
--- a/src/arch/alpha/tlb.cc
+++ b/src/arch/alpha/tlb.cc
@@ -457,7 +457,7 @@ TLB::translateData(RequestPtr req, ThreadContext *tc, bool write)
         return new DtbAlignmentFault(req->getVaddr(), req->getFlags(), flags);
     }
 
-    if (PcPAL(tc->pcState().pc())) {
+    if (PcPAL(req->getPC())) {
         mode = (req->getFlags() & Request::ALTMODE) ?
             (mode_type)ALT_MODE_AM(
                 tc->readMiscRegNoEffect(IPR_ALT_MODE))
-- 
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