From 6ed47e94644f854baa33d1e9f367cc9eebd99abf Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 25 Feb 2009 10:16:15 -0800 Subject: CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it. --- src/arch/alpha/tlb.hh | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'src/arch/alpha/tlb.hh') diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh index f5d2dbca9..877533797 100644 --- a/src/arch/alpha/tlb.hh +++ b/src/arch/alpha/tlb.hh @@ -131,7 +131,9 @@ class ITB : public TLB ITB(const Params *p); virtual void regStats(); - Fault translateAtomic(RequestPtr &req, ThreadContext *tc); + Fault translateAtomic(RequestPtr req, ThreadContext *tc); + void translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation); }; class DTB : public TLB @@ -155,7 +157,9 @@ class DTB : public TLB DTB(const Params *p); virtual void regStats(); - Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write); + Fault translateAtomic(RequestPtr req, ThreadContext *tc, bool write); + void translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation, bool write); }; } // namespace AlphaISA -- cgit v1.2.3