From 5e8287d2e2eaf058495442ea9e32fafc343a0b53 Mon Sep 17 00:00:00 2001
From: Nathanael Premillieu <nathanael.premillieu@arm.com>
Date: Wed, 5 Apr 2017 12:46:06 -0500
Subject: arch, cpu: Architectural Register structural indexing

Replace the unified register mapping with a structure associating
a class and an index. It is now much easier to know which class of
register the index is referring to. Also, when adding a new class
there is no need to modify existing ones.

Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2700
---
 src/arch/alpha/isa/branch.isa |  2 +-
 src/arch/alpha/isa/fp.isa     |  2 +-
 src/arch/alpha/isa/main.isa   | 17 +++++------------
 src/arch/alpha/registers.hh   | 12 +-----------
 4 files changed, 8 insertions(+), 25 deletions(-)

(limited to 'src/arch/alpha')

diff --git a/src/arch/alpha/isa/branch.isa b/src/arch/alpha/isa/branch.isa
index b60cb6d1e..d4b6db043 100644
--- a/src/arch/alpha/isa/branch.isa
+++ b/src/arch/alpha/isa/branch.isa
@@ -130,7 +130,7 @@ output decoder {{
     Jump::branchTarget(ThreadContext *tc) const
     {
         PCState pc = tc->pcState();
-        uint64_t Rb = tc->readIntReg(_srcRegIdx[0]);
+        uint64_t Rb = tc->readIntReg(_srcRegIdx[0].regIdx);
         pc.set((Rb & ~3) | (pc.pc() & 1));
         return pc;
     }
diff --git a/src/arch/alpha/isa/fp.isa b/src/arch/alpha/isa/fp.isa
index 4d19f1421..afece988f 100644
--- a/src/arch/alpha/isa/fp.isa
+++ b/src/arch/alpha/isa/fp.isa
@@ -149,7 +149,7 @@ output decoder {{
 
 #ifndef SS_COMPATIBLE_DISASSEMBLY
         std::string suffix("");
-        suffix += ((_destRegIdx[0] >= FP_Reg_Base)
+        suffix += ((_destRegIdx[0].regClass == FloatRegClass)
                    ? fpTrappingModeSuffix[trappingMode]
                    : intTrappingModeSuffix[trappingMode]);
         suffix += roundingModeSuffix[roundingMode];
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index a1d0de1d6..e75cec524 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -220,13 +220,6 @@ output header {{
     {
       protected:
 
-        /// Make AlphaISA register dependence tags directly visible in
-        /// this class and derived classes.  Maybe these should really
-        /// live here and not in the AlphaISA namespace.
-        enum DependenceTags {
-            FP_Reg_Base = AlphaISA::FP_Reg_Base
-        };
-
         /// Constructor.
         AlphaStaticInst(const char *mnem, ExtMachInst _machInst,
                         OpClass __opClass)
@@ -236,7 +229,7 @@ output header {{
 
         /// Print a register name for disassembly given the unique
         /// dependence tag number (FP or int).
-        void printReg(std::ostream &os, int reg) const;
+        void printReg(std::ostream &os, RegId reg) const;
 
         std::string
         generateDisassembly(Addr pc, const SymbolTable *symtab) const;
@@ -251,13 +244,13 @@ output header {{
 
 output decoder {{
     void
-    AlphaStaticInst::printReg(std::ostream &os, int reg) const
+    AlphaStaticInst::printReg(std::ostream &os, RegId reg) const
     {
-        if (reg < FP_Reg_Base) {
-            ccprintf(os, "r%d", reg);
+        if (reg.regClass == IntRegClass) {
+            ccprintf(os, "r%d", reg.regIdx);
         }
         else {
-            ccprintf(os, "f%d", reg - FP_Reg_Base);
+            ccprintf(os, "f%d", reg.regIdx);
         }
     }
 
diff --git a/src/arch/alpha/registers.hh b/src/arch/alpha/registers.hh
index 3fd774cf7..03bbd8aaf 100644
--- a/src/arch/alpha/registers.hh
+++ b/src/arch/alpha/registers.hh
@@ -33,6 +33,7 @@
 
 #include "arch/alpha/generated/max_inst_regs.hh"
 #include "arch/alpha/ipr.hh"
+#include "arch/generic/types.hh"
 #include "base/types.hh"
 
 namespace AlphaISA {
@@ -43,7 +44,6 @@ using AlphaISAInst::MaxInstDestRegs;
 // Locked read/write flags are can't be detected by the ISA parser
 const int MaxMiscDestRegs = AlphaISAInst::MaxMiscDestRegs + 1;
 
-typedef uint8_t RegIndex;
 typedef uint64_t IntReg;
 
 // floating point register file entry type
@@ -100,16 +100,6 @@ const int NumMiscRegs = NUM_MISCREGS;
 const int TotalNumRegs =
     NumIntRegs + NumFloatRegs + NumMiscRegs;
 
-// These enumerate all the registers for dependence tracking.
-enum DependenceTags {
-    // 0..31 are the integer regs 0..31
-    // 32..63 are the FP regs 0..31, i.e. use (reg + FP_Reg_Base)
-    FP_Reg_Base = NumIntRegs,
-    CC_Reg_Base = FP_Reg_Base + NumFloatRegs,
-    Misc_Reg_Base = CC_Reg_Base + NumCCRegs, // NumCCRegs == 0
-    Max_Reg_Index = Misc_Reg_Base + NumMiscRegs + NumInternalProcRegs
-};
-
 } // namespace AlphaISA
 
 #endif // __ARCH_ALPHA_REGFILE_HH__
-- 
cgit v1.2.3