From b4a76f0b0b2d0910bb1c1f3781717ec6747014b1 Mon Sep 17 00:00:00 2001
From: Gabe Black <gblack@eecs.umich.edu>
Date: Sun, 10 Oct 2010 20:37:39 -0700
Subject: Alpha: Initialize the data TLB mode IPR.

---
 src/arch/alpha/process.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/arch/alpha')

diff --git a/src/arch/alpha/process.cc b/src/arch/alpha/process.cc
index c65cf2d37..f68a53a6f 100644
--- a/src/arch/alpha/process.cc
+++ b/src/arch/alpha/process.cc
@@ -205,7 +205,8 @@ AlphaLiveProcess::initState()
     ThreadContext *tc = system->getThreadContext(contextIds[0]);
     tc->setIntReg(GlobalPointerReg, objFile->globalPointer());
     //Operate in user mode
-    tc->setMiscRegNoEffect(IPR_ICM, 0x18);
+    tc->setMiscRegNoEffect(IPR_ICM, mode_user << 3);
+    tc->setMiscRegNoEffect(IPR_DTB_CM, mode_user << 3);
     //No super page mapping
     tc->setMiscRegNoEffect(IPR_MCSR, 0);
 }
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