From 239b33e016b19aa18e70f3bc64c4e11de3f92c7d Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Nov 2011 01:25:15 -0700 Subject: SE/FS: Get rid of FULL_SYSTEM in the ARM ISA. --- src/arch/arm/faults.cc | 79 +++++++++++++++++++++++++++----------------------- 1 file changed, 43 insertions(+), 36 deletions(-) (limited to 'src/arch/arm/faults.cc') diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index 68c5fa0e8..52441e03f 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -47,6 +47,7 @@ #include "cpu/base.hh" #include "cpu/thread_context.hh" #include "debug/Faults.hh" +#include "sim/full_system.hh" namespace ArmISA { @@ -94,13 +95,13 @@ ArmFault::getVector(ThreadContext *tc) } -#if FULL_SYSTEM - void ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst) { // ARM ARM B1.6.3 FaultBase::invoke(tc); + if (!FullSystem) + return; countStat()++; SCTLR sctlr = tc->readMiscReg(MISCREG_SCTLR); @@ -165,48 +166,54 @@ ArmFault::invoke(ThreadContext *tc, StaticInstPtr inst) void Reset::invoke(ThreadContext *tc, StaticInstPtr inst) { - tc->getCpuPtr()->clearInterrupts(); - tc->clearArchRegs(); + if (FullSystem) { + tc->getCpuPtr()->clearInterrupts(); + tc->clearArchRegs(); + } ArmFault::invoke(tc, inst); } -#else - void UndefinedInstruction::invoke(ThreadContext *tc, StaticInstPtr inst) { - // If the mnemonic isn't defined this has to be an unknown instruction. - assert(unknown || mnemonic != NULL); - if (disabled) { - panic("Attempted to execute disabled instruction " - "'%s' (inst 0x%08x)", mnemonic, machInst); - } else if (unknown) { - panic("Attempted to execute unknown instruction (inst 0x%08x)", - machInst); + if (FullSystem) { + ArmFault::invoke(tc, inst); } else { - panic("Attempted to execute unimplemented instruction " - "'%s' (inst 0x%08x)", mnemonic, machInst); + // If the mnemonic isn't defined this has to be an unknown instruction. + assert(unknown || mnemonic != NULL); + if (disabled) { + panic("Attempted to execute disabled instruction " + "'%s' (inst 0x%08x)", mnemonic, machInst); + } else if (unknown) { + panic("Attempted to execute unknown instruction (inst 0x%08x)", + machInst); + } else { + panic("Attempted to execute unimplemented instruction " + "'%s' (inst 0x%08x)", mnemonic, machInst); + } } } void SupervisorCall::invoke(ThreadContext *tc, StaticInstPtr inst) { - // As of now, there isn't a 32 bit thumb version of this instruction. - assert(!machInst.bigThumb); - uint32_t callNum; - callNum = tc->readIntReg(INTREG_R7); - tc->syscall(callNum); - - // Advance the PC since that won't happen automatically. - PCState pc = tc->pcState(); - assert(inst); - inst->advancePC(pc); - tc->pcState(pc); + if (FullSystem) { + ArmFault::invoke(tc, inst); + } else { + // As of now, there isn't a 32 bit thumb version of this instruction. + assert(!machInst.bigThumb); + uint32_t callNum; + callNum = tc->readIntReg(INTREG_R7); + tc->syscall(callNum); + + // Advance the PC since that won't happen automatically. + PCState pc = tc->pcState(); + assert(inst); + inst->advancePC(pc); + tc->pcState(pc); + } } -#endif // FULL_SYSTEM - template void AbortFault::invoke(ThreadContext *tc, StaticInstPtr inst) @@ -245,13 +252,13 @@ template void AbortFault::invoke(ThreadContext *tc, void ArmSev::invoke(ThreadContext *tc, StaticInstPtr inst) { DPRINTF(Faults, "Invoking ArmSev Fault\n"); -#if FULL_SYSTEM - // Set sev_mailbox to 1, clear the pending interrupt from remote - // SEV execution and let pipeline continue as pcState is still - // valid. - tc->setMiscReg(MISCREG_SEV_MAILBOX, 1); - tc->getCpuPtr()->clearInterrupt(INT_SEV, 0); -#endif + if (FullSystem) { + // Set sev_mailbox to 1, clear the pending interrupt from remote + // SEV execution and let pipeline continue as pcState is still + // valid. + tc->setMiscReg(MISCREG_SEV_MAILBOX, 1); + tc->getCpuPtr()->clearInterrupt(INT_SEV, 0); + } } // return via SUBS pc, lr, xxx; rfe, movs, ldm -- cgit v1.2.3