From c23e8c31ebd4e856f205f5bdd8f4eb5e1eec87ee Mon Sep 17 00:00:00 2001 From: Min Kyu Jeong Date: Wed, 25 Aug 2010 19:10:43 -0500 Subject: ARM: Adding a bogus fault that does nothing. This fault can used to flush the pipe, not including the faulting instruction. The particular case I needed this was for a self-modifying code. It needed to drain the store queue and force the following instruction to refetch from icache. DCCMVAC cp15 mcr instruction is modified to raise this fault. --- src/arch/arm/faults.cc | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'src/arch/arm/faults.cc') diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index 79973185d..2a6b7c359 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -71,6 +71,9 @@ template<> ArmFault::FaultVals ArmFaultVals::vals = template<> ArmFault::FaultVals ArmFaultVals::vals = {"FIQ", 0x1C, MODE_FIQ, 4, 4, true, true}; +template<> ArmFault::FaultVals ArmFaultVals::vals = + {"Pipe Flush", 0x00, MODE_SVC, 0, 0, true, true}; // some dummy values + Addr ArmFault::getVector(ThreadContext *tc) { @@ -213,12 +216,22 @@ AbortFault::invoke(ThreadContext *tc) tc->setMiscReg(T::FarIndex, faultAddr); } +void +FlushPipe::invoke(ThreadContext *tc) { + DPRINTF(Faults, "Invoking FlushPipe Fault\n"); + + // Set the PC to the next instruction of the faulting instruction. + // Net effect is simply squashing all instructions behind and + // start refetching from the next instruction. + tc->setPC(tc->readNextPC()); + tc->setNextPC(tc->readNextNPC()); + tc->setMicroPC(0); + tc->setNextMicroPC(1); +} + template void AbortFault::invoke(ThreadContext *tc); template void AbortFault::invoke(ThreadContext *tc); // return via SUBS pc, lr, xxx; rfe, movs, ldm - - } // namespace ArmISA - -- cgit v1.2.3