From 6c1b10043fd7c79e1beaae8dd52b93c12fdec42c Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 2 Jun 2010 12:58:08 -0500 Subject: ARM: Rename the RevOp base class to something more generic. --- src/arch/arm/insts/misc.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/arch/arm/insts/misc.cc') diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc index 20f102e72..a63bad690 100644 --- a/src/arch/arm/insts/misc.cc +++ b/src/arch/arm/insts/misc.cc @@ -144,7 +144,7 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string -RevOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const +RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; printMnemonic(ss); -- cgit v1.2.3